Physical Design Manager

Marvell Technology
Full-timePetah Tikva, Israel

📍 Job Overview

Job Title: Physical Design Manager

Company: Marvell Technology

Location: Petah Tikva, Israel

Job Type: Full-Time

Category: Hardware Engineering / Semiconductor Design Management

Date Posted: August 17, 2026

Experience Level: 10+ years

Remote Status: On-site

🚀 Role Summary

  • Lead and manage a team of engineers focused on the physical design of cutting-edge semiconductor solutions essential for Marvell's data infrastructure, cloud, and AI initiatives.

  • Drive the successful execution and delivery of complex physical design projects, ensuring alignment with Marvell's strategic objectives and technological roadmap.

  • Foster a collaborative and innovative team environment, promoting best practices in hardware engineering and semiconductor design methodologies.

  • Contribute to the technical strategy and roadmap development for physical design, influencing the future of Marvell's product offerings.

📝 Enhancement Note: The role of a Physical Design Manager in a company like Marvell, a leader in data infrastructure semiconductors, is critical. This position goes beyond standard engineering management, requiring a deep understanding of the entire physical design flow, from floorplanning to tape-out, within the context of high-performance, power-efficient chip development. The emphasis on "Data Infrastructure, Cloud, and AI" signifies the strategic importance of this role in enabling Marvell's core business and future growth areas.

📈 Primary Responsibilities

  • Manage and mentor a team of physical design engineers, fostering their technical growth and ensuring project deliverables are met on time and within specifications.

  • Oversee the end-to-end physical design flow, including floorplanning, placement, routing, clock tree synthesis (CTS), timing closure, power analysis, and physical verification.

  • Collaborate closely with logic design, verification, analog, and system teams to ensure successful integration and validation of complex chip designs.

  • Define and implement physical design methodologies, flows, and best practices to improve efficiency, quality, and performance of Marvell's semiconductor products.

  • Develop and maintain project schedules, resource plans, and risk assessments for physical design activities.

  • Drive technical problem-solving and root cause analysis for any physical design challenges encountered during the development cycle.

  • Present technical strategies, project status, and design reviews to senior management and cross-functional stakeholders.

  • Ensure compliance with export control regulations (e.g., EAR) related to technology and information sharing.

📝 Enhancement Note: Given the "Physical Design Manager" title and the company's focus on semiconductors for data infrastructure, the responsibilities will heavily involve the technical intricacies of chip layout and optimization. The role demands a strong understanding of the full ASIC physical design flow, including advanced nodes, power management techniques, and timing closure strategies critical for high-performance computing and networking applications. The manager will be responsible not just for team output but for the technical direction and quality of the physical implementation.

🎓 Skills & Qualifications

Education: Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field. A Ph.D. in a relevant discipline is a plus.

Experience: Minimum of 10 years of progressive experience in semiconductor physical design, with at least 3-5 years in a leadership or management role.

Required Skills:

  • Proven track record in managing and leading teams of physical design engineers.

  • Deep expertise in all aspects of ASIC physical design, including floorplanning, placement, routing, CTS, static timing analysis (STA), power analysis, and physical verification (DRC/LVS).

  • Hands-on experience with advanced semiconductor process nodes (e.g., 7nm, 5nm, 3nm).

  • Strong understanding of chip architecture, logic design, and verification concepts relevant to physical implementation.

  • Proficiency in industry-standard EDA tools for physical design (e.g., Synopsys, Cadence, Siemens EDA).

  • Excellent project management skills, with the ability to define, track, and manage complex design schedules and resources.

  • Strong analytical and problem-solving skills, with a data-driven approach to decision-making.

  • Excellent communication, presentation, and interpersonal skills, with the ability to effectively collaborate with cross-functional teams and senior management.

  • Familiarity with export control regulations (e.g., EAR) and their implications for technology development and international collaboration. Preferred Skills:

  • Experience with machine learning or AI applications in semiconductor design optimization.

  • Knowledge of low-power design techniques and implementation.

  • Experience with scripting languages (e.g., TCL, Python, Perl) for flow automation.

  • Familiarity with advanced packaging technologies.

  • Experience in managing distributed or global engineering teams.

📝 Enhancement Note: The "10+" experience level, combined with the management aspect, implies a need for seasoned professionals who can not only execute but also strategize and mentor. The "AI" and "Cloud" keywords in the company description suggest that experience with designs for these domains, which often have specific power, performance, and area (PPA) requirements, will be highly valued. The explicit mention of export control highlights a crucial compliance aspect for this role.

📊 Process & Systems Portfolio Requirements

Portfolio Essentials:

  • Demonstrate a portfolio of successfully delivered complex ASIC physical design projects, showcasing leadership and technical contributions.

  • Provide evidence of implemented process improvements that led to significant gains in design cycle time, PPA (Power, Performance, Area), or yield.

  • Showcase experience with implementing and optimizing physical design flows using industry-standard EDA tools.

  • Include examples of how you have managed project risks, resolved critical design issues, and met aggressive tape-out schedules. Process Documentation:

  • Present documented methodologies for floorplanning, placement, routing, and timing closure tailored to high-performance designs.

  • Provide examples of process documentation for physical verification steps, including DRC, LVS, and ERC checks.

  • Detail processes for power integrity analysis and optimization, including IR drop and EM analysis.

  • Showcase approaches to design for manufacturability (DFM) and design for testability (DFT) integration within the physical design flow.

📝 Enhancement Note: For a management role in physical design, a portfolio should not just list projects but demonstrate strategic thinking and leadership in process execution. This includes showcasing how the candidate has improved existing flows, managed complex project timelines, and led teams through challenging technical obstacles. The emphasis should be on the impact of their leadership on project outcomes and team development.

💵 Compensation & Benefits

Salary Range: While a specific range is not provided, for a Physical Design Manager role with 10+ years of experience in Petah Tikva, Israel, the estimated annual salary range is likely between ₪400,000 to ₪750,000 (approximately $110,000 - $200,000 USD), depending on specific experience, qualifications, and negotiation. This estimate is based on industry benchmarks for senior engineering management positions in the semiconductor sector in Israel.

Benefits:

  • Bonus plan: Eligibility for annual performance-based bonuses.

  • Equity plans: Participation in Marvell's equity programs, including stock options or restricted stock units.

  • New hire equity grant: A significant equity grant upon joining the company.

  • Annual equity refreshers: Regular equity grants to retain and reward long-term contributions.

  • Comprehensive health insurance and wellness programs.

  • Professional development opportunities, including training and conference attendance.

  • Paid time off, including vacation, sick leave, and holidays.

  • Retirement savings plans.

Working Hours: Standard full-time work hours, typically 40 hours per week. However, project demands may occasionally require extended hours or weekend work, especially during critical design phases like tape-out.

📝 Enhancement Note: The provided benefits are explicitly mentioned in the job description, highlighting Marvell's commitment to rewarding its employees. The salary estimate is based on market research for similar roles in Israel's tech sector, considering the company's profile and the seniority of the position. It's crucial for candidates to research current local market rates for comparable positions.

🎯 Team & Company Context

🏢 Company Culture

Industry: Semiconductors / Data Infrastructure Technology. Marvell is a key player in providing high-performance semiconductor solutions that are foundational to the modern digital world, powering enterprise, cloud, AI, and carrier networks.

Company Size: Marvell Technology is a large, publicly traded company with thousands of employees globally, indicating a well-established corporate structure with ample resources and opportunities.

Founded: Marvell was founded in 1995, signifying decades of experience and innovation in the semiconductor industry.

Team Structure:

  • The Physical Design team likely operates within Marvell's broader Engineering or Product Development division, focusing on the physical realization of complex System-on-Chips (SoCs).

  • This team will likely consist of specialized engineers focusing on different aspects of physical design (floorplanning, timing, power, verification).

  • The Manager will report to a Director or VP of Engineering and will work closely with other engineering managers (e.g., logic design, verification, DFT) and project leads.

  • Cross-functional collaboration is essential, involving close interaction with architects, IP integration teams, packaging engineers, and manufacturing teams. Methodology:

  • Marvell likely employs rigorous, data-driven methodologies for chip design, emphasizing efficiency, quality, and performance.

  • This includes leveraging advanced EDA tools and flows, focusing on automation, and implementing strict verification and validation processes.

  • A culture of continuous improvement and innovation is expected, encouraging engineers to explore new techniques and optimize existing workflows.

  • Emphasis on collaboration, knowledge sharing, and proactive problem-solving is characteristic of successful semiconductor development environments.

Company Website: https://www.marvell.com/

📝 Enhancement Note: Marvell's focus on "connecting our world" and "data infrastructure" suggests a company culture that values impact, innovation, and robustness. The company's long history implies a stable yet forward-thinking environment. The team structure will be highly specialized, typical of leading semiconductor firms, requiring strong technical leadership and collaborative skills.

📈 Career & Growth Analysis

Operations Career Level: This role represents a senior leadership position within the hardware engineering domain, specifically focusing on physical design. It's a critical management role that bridges technical expertise with team leadership, directly impacting product development timelines and quality.

Reporting Structure: The Physical Design Manager typically reports to a Director or Vice President of Engineering. They will manage a team of individual contributors (physical design engineers) and may have indirect influence over junior team leads.

Operations Impact: This role has a profound impact on Marvell's ability to deliver competitive semiconductor products. Successful physical design is crucial for achieving target performance, power efficiency, and manufacturing yield, directly influencing product cost, market competitiveness, and ultimately, revenue. The manager's decisions and team's execution are fundamental to Marvell's success in its target markets (cloud, AI, enterprise, carrier).

Growth Opportunities:

  • Technical Specialization: Opportunity to deepen expertise in advanced process nodes, novel power management techniques, or emerging physical design challenges in AI/ML hardware.

  • Leadership Advancement: Potential to move into higher management roles (e.g., Director of Physical Design, VP of Engineering) overseeing larger teams or broader functional areas.

  • Strategic Influence: Opportunity to contribute to Marvell's overall technology strategy, influencing R&D investment and future product roadmaps.

  • Cross-Functional Leadership: Transition into roles involving broader product development leadership or program management.

  • Industry Recognition: Opportunities to represent Marvell at industry conferences, contribute to standards bodies, or publish technical papers.

📝 Enhancement Note: The "10+" years of experience and management requirement firmly place this role at a senior level. Growth opportunities will focus on expanding leadership scope, deepening technical mastery in specialized areas of physical design crucial for AI and cloud, or moving into broader product development strategy.

🌐 Work Environment

Office Type: This is an on-site role, suggesting a dedicated engineering office environment designed for collaboration and access to specialized hardware/software infrastructure.

Office Location(s): Petah Tikva, Israel. This location is a significant technology hub in Israel, offering access to a strong talent pool and a vibrant tech ecosystem.

Workspace Context:

  • The workspace will likely be an office setting with dedicated desks for engineers, equipped with high-performance workstations necessary for running complex EDA tools.

  • Collaboration spaces, meeting rooms with advanced AV equipment, and potentially lab facilities for hardware bring-up will be available.

  • The environment is expected to be fast-paced and intellectually stimulating, with a strong emphasis on technical problem-solving and teamwork.

  • Access to Marvell's internal network, servers, and specialized software licenses will be standard.

Work Schedule: The standard work schedule is full-time (approximately 40 hours per week). However, the demanding nature of semiconductor design cycles, particularly nearing tape-out, may necessitate flexible working hours or occasional overtime to meet critical project deadlines.

📝 Enhancement Note: The on-site requirement is typical for roles involving sensitive IP, specialized hardware, and intensive collaborative design work in the semiconductor industry. Petah Tikva's status as a tech hub suggests a dynamic and resource-rich work environment.

📄 Application & Portfolio Review Process

Interview Process:

  • Initial Screening: HR or recruiter call to assess basic qualifications, experience, and cultural fit.

  • Hiring Manager Interview: In-depth discussion with the Hiring Manager focusing on leadership experience, team management philosophy, and technical depth in physical design.

  • Technical Interviews: Series of interviews with senior engineers and potential peers, focusing on specific physical design challenges, methodologies, and problem-solving abilities. This may include whiteboard sessions or deep dives into past project experiences.

  • Cross-Functional Interview: Meeting with stakeholders from related teams (e.g., logic design, verification) to assess collaboration skills and understanding of the broader product development lifecycle.

  • Presentation/Case Study: Candidates may be asked to present a case study from their portfolio demonstrating a complex physical design challenge, their approach, and the outcomes.

  • Final Interview: Discussion with senior leadership (e.g., Director/VP) to evaluate strategic thinking, leadership potential, and overall fit with Marvell's vision.

Portfolio Review Tips:

  • Focus on Leadership: Highlight instances where you led teams through complex technical challenges, mentored engineers, and improved team performance.

  • Quantify Impact: Use metrics to demonstrate the success of your projects and process improvements (e.g., % improvement in timing closure, reduction in power consumption, decrease in design cycle time, successful tape-outs).

  • Showcase Problem-Solving: Detail specific complex technical issues encountered in physical design and how you and your team effectively resolved them.

  • Process Innovation: Present examples of how you introduced or optimized physical design flows, tools, or methodologies to enhance efficiency and quality.

  • Tailor to Marvell: Research Marvell's product lines and technology focus (AI, cloud, data infrastructure) and be prepared to discuss how your experience aligns with their needs.

Challenge Preparation:

  • Technical Deep Dive: Be prepared to discuss advanced physical design concepts, trade-offs, and best practices in detail.

  • Leadership Scenarios: Anticipate behavioral questions about managing difficult team members, resolving conflicts, motivating teams, and handling project setbacks.

  • Strategic Thinking: Prepare to discuss your vision for physical design teams, how you stay abreast of industry trends, and how you would contribute to Marvell's technological roadmap.

  • Export Control Awareness: Be ready to discuss your understanding of export control regulations and how they apply to your work in a global company.

📝 Enhancement Note: The interview process for a management role in a leading semiconductor company like Marvell will be rigorous, assessing both technical acumen and leadership capabilities. A strong, well-documented portfolio that showcases tangible achievements and strategic thinking in physical design leadership is essential.

🛠 Tools & Technology Stack

Primary Tools:

  • Physical Design Suites: Deep expertise with industry-leading EDA tools such as Synopsys (e.g., IC Compiler II/Fusion Compiler for P&R, PrimeTime for STA, StarRC for Extraction, IC Validator for Physical Verification), Cadence (e.g., Innovus for P&R, Tempus for STA, Quantus for Extraction, Pegasus for Physical Verification), or Siemens EDA (formerly Mentor Graphics).

  • Flow Automation & Scripting: Proficiency in scripting languages like TCL, Python, and Perl for automating physical design flows, tool setup, and data analysis.

  • Version Control Systems: Experience with Git, Perforce, or similar systems for managing design data and code.

Analytics & Reporting:

  • Timing Analysis Tools: Expertise in interpreting and acting upon results from STA tools (PrimeTime, Tempus).

  • Power Analysis Tools: Familiarity with tools for IR drop, EM analysis, and overall power budgeting.

  • Reporting & Visualization: Tools for generating design reports, summarizing timing/power results, and potentially dashboarding tools for project status.

CRM & Automation:

  • Project Management Software: Familiarity with tools like JIRA, Asana, or Microsoft Project for task tracking, scheduling, and resource management.

  • Internal Collaboration Tools: Proficiency with Marvell's internal communication and collaboration platforms (e.g., Slack, Microsoft Teams, Confluence).

📝 Enhancement Note: The core of this role revolves around mastery of sophisticated EDA tools and the ability to automate and optimize complex physical design flows. A strong command of scripting is crucial for efficiency, and familiarity with project management tools is expected for effective team leadership.

👥 Team Culture & Values

Operations Values:

  • Innovation & Excellence: A drive to push the boundaries of semiconductor technology and deliver high-quality, high-performance designs.

  • Collaboration: Strong emphasis on teamwork, open communication, and cross-functional partnership to achieve common goals.

  • Data-Driven Decisions: Utilizing metrics and analysis to guide design choices, process improvements, and problem-solving.

  • Integrity & Accountability: Upholding ethical standards, taking ownership of responsibilities, and delivering on commitments.

  • Continuous Learning: Encouraging professional development and staying current with the rapidly evolving semiconductor landscape.

Collaboration Style:

  • Cross-Functional Integration: Expect close collaboration with logic design, verification, DFT, analog design, IP integration, packaging, and manufacturing teams.

  • Proactive Communication: Regular team meetings, design reviews, and status updates to ensure alignment and address issues promptly.

  • Knowledge Sharing: A culture that encourages sharing best practices, lessons learned, and technical insights across the team and with other departments.

  • Constructive Feedback: Openness to providing and receiving constructive feedback to foster continuous improvement in both technical execution and team dynamics.

📝 Enhancement Note: Marvell, as a leading tech company, will likely foster a culture that values technical rigor, innovation, and collaborative problem-solving. The emphasis on "data infrastructure, cloud, and AI" suggests a forward-thinking, results-oriented environment.

⚡ Challenges & Growth Opportunities

Challenges:

  • PPA Optimization: Continuously balancing Power, Performance, and Area (PPA) targets for complex SoCs, especially for cutting-edge AI and cloud applications, which often have demanding requirements.

  • Technology Scaling: Adapting physical design methodologies to increasingly smaller and more complex process nodes, which introduce new challenges in variability, reliability, and manufacturability.

  • Global Team Management: Effectively leading and coordinating a team that may include members across different time zones and cultural backgrounds.

  • Rapid Technological Evolution: Keeping pace with the accelerating advancements in AI, cloud computing, and semiconductor technology, and translating these into effective physical design strategies.

  • Export Control Compliance: Navigating the complexities of international regulations related to technology transfer and collaboration.

Learning & Development Opportunities:

  • Advanced Technical Training: Access to training on the latest EDA tools, advanced semiconductor processes, and emerging design techniques.

  • Leadership Development Programs: Marvell likely offers internal programs focused on enhancing management, strategic planning, and leadership skills.

  • Industry Conferences: Opportunities to attend and present at leading semiconductor industry conferences (e.g., DAC, ISSCC, Hot Chips) to gain insights and network.

  • Mentorship: Potential to be mentored by senior leaders within Marvell or to mentor junior engineers, fostering a continuous learning environment.

  • Exposure to Diverse Projects: Working on a variety of challenging projects across different Marvell product lines provides broad exposure and skill diversification.

📝 Enhancement Note: The challenges are inherent to the semiconductor industry's rapid pace and complexity, particularly in advanced domains like AI. Growth opportunities will focus on technical depth, leadership expansion, and strategic impact within Marvell.

💡 Interview Preparation

Strategy Questions:

  • Leadership Philosophy: "Describe your approach to leading a physical design team. How do you motivate engineers, foster collaboration, and ensure accountability?" Be ready to provide specific examples of your leadership style in action.

  • Technical Problem Solving: "Walk me through a time you faced a significant physical design challenge (e.g., critical timing closure issue, complex routing congestion, power integrity problem). What was your approach, what steps did you take, and what was the outcome?" Focus on your analytical process and decision-making.

  • Process Improvement: "Describe a time you identified an opportunity to improve a physical design flow or methodology. What changes did you implement, and what were the measurable results?" Quantify the impact whenever possible.

  • Stakeholder Management: "How do you manage communication and expectations with cross-functional teams (logic design, verification, system) and senior management, especially during challenging project phases?"

Company & Culture Questions:

  • Marvell's Impact: "How do you see your role as a Physical Design Manager contributing to Marvell's mission of enabling the data infrastructure that connects our world?" Research Marvell's key markets and products.

  • Team Dynamics: "What are the key elements of a high-performing physical design team, and how would you foster that environment at Marvell?"

  • Innovation: "How do you encourage innovation within your team, and how do you stay current with the latest advancements in physical design and semiconductor technology?"

Portfolio Presentation Strategy:

  • Structure: Organize your presentation logically: Problem -> Your Role/Approach -> Actions Taken -> Results (quantified).

  • Focus on Leadership: Emphasize your role in guiding the team, making key decisions, and resolving issues, not just individual technical contributions.

  • Visual Aids: Use clear diagrams, charts, and metrics to illustrate complex concepts and outcomes effectively.

  • Conciseness: Be precise and get to the point. Highlight the most impactful aspects of your experience that align with Marvell's needs.

  • Q&A Readiness: Anticipate questions about your methodology, trade-offs, and alternative approaches.

📝 Enhancement Note: Preparation should focus on articulating both technical depth and leadership effectiveness, supported by concrete examples from the candidate's experience. Demonstrating an understanding of Marvell's business and the specific challenges in their target markets will be crucial.

📌 Application Steps

To apply for this operations position:

  • Submit your application through the Marvell Careers portal via the provided link.

  • Portfolio Customization: Prepare a concise portfolio or presentation highlighting 2-3 key physical design projects where you demonstrated significant leadership and technical impact. Focus on projects relevant to data infrastructure, cloud, or AI applications if possible. Quantify achievements with metrics.

  • Resume Optimization: Ensure your resume clearly articulates your years of experience in physical design management, specific EDA tool proficiencies, team leadership accomplishments, and familiarity with advanced process nodes. Integrate keywords like "Physical Design Manager," "Semiconductor," "ASIC," "EDA tools," "PPA," "STA," "Team Management," and "Export Control."

  • Interview Preparation: Practice articulating your leadership philosophy, technical problem-solving skills, and process improvement methodologies using the STAR method (Situation, Task, Action, Result). Prepare specific examples for behavioral and technical questions.

  • Company Research: Thoroughly research Marvell Technology, its products, recent news, and its role in the semiconductor industry, particularly in AI, cloud, and data infrastructure. Understand their values and culture to articulate your fit.

⚠️ Important Notice: This enhanced job description includes AI-generated insights and operations industry-standard assumptions. All details should be verified directly with the hiring organization before making application decisions.

Application Requirements

Candidates must have prior experience managing people and a strong background in physical design projects. The role requires the ability to work autonomously and possess the technical expertise to guide team members through complex design tasks.