Principal Engineer Compact Modeling and Virtual Prototyping (f/m/div)

📍 Job Overview

Job Title: Principal Engineer Compact Modeling and Virtual Prototyping (f/m/div)

Company: Infineon

Location: Munich, Bavaria, Germany / Bavaria, Germany

Job Type: FULL_TIME

Category: Engineering / Science & Research / Technology

Date Posted: 2026-09-14

Experience Level: Principal / Senior (10+ years)

Remote Status: Hybrid

🚀 Role Summary

• Lead the development of advanced compact models for power semiconductor devices, focusing on electrical, thermal, and electro-thermal characteristics using physics-based and behavioral modeling.

• Drive innovation in modeling methodologies, including the application of AI techniques for enhanced accuracy, convergence, and simulation efficiency.

• Serve as a key technical interface for compact modeling strategies, collaborating with internal teams and external bodies like the Compact Model Coalition (CMC).

• Independently define and manage work packages, prioritize tasks, and implement technical solutions with a high degree of autonomy and ownership.

• Support application engineers by providing robust compact models and resolving complex technical challenges related to device behavior in application environments.

📝 Enhancement Note: This role is positioned as a Principal Engineer, indicating a senior leadership and technical expert capacity. The emphasis on "virtual prototyping" suggests a strategic role in accelerating product development cycles through advanced simulation. The "f/m/div" designation signifies that the role is open to all genders and diversities, aligning with Infineon's inclusivity values.

📈 Primary Responsibilities

• Develop and refine compact models for high-voltage power semiconductor devices (MOSFETs, JFETs, diodes, IGBTs) in Silicon (Si) and Silicon Carbide (SiC) technologies, employing both physics-based and behavioral modeling approaches.

• Convert existing baseline models into Verilog-A and create converters for translating Verilog-A models back to SPICE for broader simulation platform compatibility.

• Implement and optimize methodologies for physics-based device compact models to ensure superior convergence and portability across various simulation platforms.

• Rigorously verify compact models using application-oriented test circuits, either provided or developed independently, to ensure accuracy and reliability.

• Evaluate device behavior in parasitic application environments and analyze their representation through different modeling techniques.

• Drive the continuous advancement of modeling methodologies and measurement techniques, staying at the forefront of compact modeling advancements.

• Provide critical technical support to application engineers in resolving complex device-related challenges and contribute to the optimization of product performance.

• Act as the primary technical liaison with the Compact Model Coalition (CMC), representing Infineon's interests and contributing to industry-wide modeling standards.

• Independently define tasks, set priorities, and determine approaches within the scope of responsibility, demonstrating strong initiative and decision-making capabilities.

• Operate with a significant level of autonomy, taking full ownership of work packages, project timelines, and the successful delivery of technical solutions.

📝 Enhancement Note: The responsibilities highlight a blend of hands-on model development and strategic technical leadership. The emphasis on SiC technologies indicates a focus on next-generation power electronics, a critical area for Infineon. The expectation to "independently define tasks, priorities, and approaches" underscores the senior and autonomous nature of this Principal Engineer role.

🎓 Skills & Qualifications

Education: University degree or PhD in Electrical Engineering, Physics, or a closely related scientific/engineering discipline.

Experience: Minimum of 10+ years of extensive professional experience in semiconductor and device physics, with a deep specialization in compact modeling and the application of simulation tools.

Required Skills:

• Deep expertise in semiconductor and device physics, particularly concerning power semiconductor devices.

• Proven experience in compact modeling, including both physics-based and behavioral modeling techniques.

• High proficiency in Verilog-A for compact model implementation and development.

• Strong understanding of SPICE simulation environments and their requirements for compact models.

• Experience with optimization and parameter extraction techniques for calibrating and tuning compact models.

• Demonstrated ability to improve compact model performance, focusing on simulation convergence and runtime optimization.

• Experience with AI techniques applied to compact modeling and model development.

• Excellent analytical and problem-solving skills, with a keen eye for detail in model calibration, implementation, and validation.

• Strong self-management, prioritization, and independent work capabilities.

• Effective communication and stakeholder management skills, with the ability to liaise with diverse technical groups and external bodies.

• Proven teamwork and collaboration skills, essential for working with various users of simulation environments.

• Organized and methodical working style with robust documentation and reporting capabilities.

• Agile learning mindset with an innovative approach, particularly regarding AI-based modeling. Preferred Skills:

• Experience with Silicon Carbide (SiC) and Silicon (Si) device physics and their specific modeling challenges.

• Familiarity with the Compact Model Coalition (CMC) and its activities.

• Experience in virtual prototyping methodologies and their integration into product development workflows.

• Knowledge of advanced simulation platforms and their scripting capabilities.

• Understanding of measurement techniques for device characterization relevant to model calibration.

📝 Enhancement Note: The requirement for 10+ years of experience specifically in semiconductor and device physics, coupled with compact modeling expertise, firmly places this role at a principal or lead engineer level. The explicit mention of AI techniques suggests that candidates with experience in machine learning for device modeling will have a significant advantage.

📊 Process & Systems Portfolio Requirements

Portfolio Essentials:

• Showcase of developed compact models, clearly illustrating the modeling approach (physics-based, behavioral, or hybrid) and the specific devices modeled.

• Examples of model validation against experimental data or application-specific test circuits, demonstrating accuracy and predictive capabilities.

• Documentation of process optimization efforts related to model convergence, simulation speed, or parameter extraction efficiency.

• Case studies demonstrating the application of AI techniques in compact model development or refinement.

• Evidence of Verilog-A code snippets or descriptions of model implementation strategies. Process Documentation:

• Examples of documented workflows for compact model development, from initial concept and device characterization to final model validation and release.

• Demonstrations of how process improvements have been implemented and measured for impact on simulation performance or model accuracy.

• Artifacts illustrating the methodology used for parameter extraction, calibration, and tuning of compact models.

• Documentation of contributions to or interactions with industry modeling standards bodies (e.g., CMC).

📝 Enhancement Note: For a Principal Engineer role, the portfolio is expected to demonstrate not just technical proficiency but also strategic thinking and leadership in process development. Candidates should be prepared to articulate the ROI of their modeling work and process improvements.

💵 Compensation & Benefits

Salary Range: As this is a Principal Engineer role at a major technology company in Munich, Germany, the estimated annual gross salary range is expected to be between €100,000 and €140,000. This range is based on industry benchmarks for senior engineering positions in the semiconductor sector in Germany, considering the high level of expertise required.

Benefits:

• Comprehensive health insurance and retirement plans.

• Generous paid time off and holidays.

• Opportunities for professional development, including training, conferences, and further education.

• Access to cutting-edge technology and research facilities.

• Relocation assistance may be available for international candidates.

• Employee assistance programs and wellness initiatives.

• Diversity and inclusion programs fostering a supportive work environment.

• Equal opportunity workplace commitment.

Working Hours: The standard working hours are approximately 40 hours per week, with flexibility often available. As a Principal Engineer, there may be expectations for occasional overtime to meet critical project deadlines, but a healthy work-life balance is generally promoted.

📝 Enhancement Note: Salary estimates are based on market data for Principal Engineers in the semiconductor industry in Munich, Germany, factoring in the specialized nature of compact modeling and virtual prototyping. Infineon is known for competitive compensation and comprehensive benefits packages.

🎯 Team & Company Context

🏢 Company Culture

Industry: Semiconductor Manufacturing, Power Systems, IoT solutions. Infineon is a global leader in developing semiconductor solutions for automotive, industrial, and consumer applications, focusing on energy efficiency, mobility, and security.

Company Size: Infineon is a large enterprise, employing over 50,000 people worldwide, indicating a structured yet dynamic environment with ample resources and opportunities for collaboration.

Founded: Founded in 1999, Infineon has a strong legacy in the semiconductor industry, evolving from its roots in Siemens AG. This history suggests a culture that values innovation, long-term vision, and deep technical expertise.

Team Structure:

• The Research & Development (R&D) team is likely composed of highly specialized engineers and scientists, with this role reporting into a senior R&D management position.

• The compact modeling group operates at the intersection of device physics, simulation, and application engineering, requiring close collaboration with product development teams.

• Cross-functional collaboration is essential, involving interactions with device characterization labs, application engineers, product managers, and potentially external research institutions and industry consortia like the CMC. Methodology:

• Data-driven decision-making, with a strong emphasis on rigorous validation of models against experimental data.

• Agile development principles may be applied to model development and optimization cycles.

• Continuous improvement methodologies are expected, particularly in refining modeling techniques and simulation efficiency.

• A culture of innovation and knowledge sharing, encouraging the exploration of new technologies like AI in modeling.

Company Website: https://www.infineon.com/

📝 Enhancement Note: Infineon's focus on "green and efficient energy, clean and safe mobility, as well as smart and secure IoT" indicates that this role contributes to technologies with significant societal impact. The company's commitment to diversity and inclusion, as explicitly stated, is a key cultural aspect.

📈 Career & Growth Analysis

Operations Career Level: Principal Engineer. This level signifies a senior individual contributor role with significant technical authority, responsibility for strategic direction within their domain, and often mentorship of junior engineers. It is a critical role for driving innovation and ensuring the technical excellence of the company's modeling capabilities.

Reporting Structure: The role likely reports to a Director or Senior Manager within the Research & Development or Modeling department. While highly autonomous, there will be reporting lines and performance reviews aligned with Infineon's corporate structure.

Operations Impact: This role's impact is fundamental to Infineon's product development lifecycle. Accurate and efficient compact models are crucial for virtual prototyping, enabling faster design cycles, reducing physical prototyping costs, and ensuring optimal performance of power semiconductor devices in customer applications. This directly influences time-to-market, product quality, and ultimately, revenue.

Growth Opportunities:

• Advancement to higher technical leadership roles, such as Chief Engineer or Fellow, focusing on specific areas of modeling or simulation technology.

• Transition into management roles, leading R&D teams or specific modeling groups.

• Opportunities to represent Infineon in industry forums and standardization bodies, enhancing professional visibility and influence.

• Specialization in emerging areas like advanced AI-driven modeling, novel semiconductor materials (e.g., next-gen SiC, GaN), or complex electro-thermal co-simulation.

• Mentorship programs for junior engineers, contributing to the development of the next generation of modeling experts.

📝 Enhancement Note: The "Principal" title implies a career path focused on deep technical expertise and influence, rather than necessarily moving into people management, though that is also an option. The role offers substantial opportunity for impact and growth within a specialized, high-demand field.

🌐 Work Environment

Office Type: This is likely a hybrid role, offering a blend of on-site work at Infineon's facilities in Munich or Erding and remote work flexibility. The on-site environment would be a modern, well-equipped corporate R&D setting.

Office Location(s): The primary locations are Munich and Erding (near Munich), Germany. These are major technology hubs with excellent infrastructure and access to talent.

Workspace Context:

• On-site, expect access to state-of-the-art simulation software, high-performance computing resources, and potentially lab facilities for device characterization support.

• The environment is likely collaborative, with dedicated spaces for team meetings, technical discussions, and independent work.

• Opportunities for informal knowledge sharing with peers and cross-functional teams within the R&D organization.

• The hybrid nature allows for focused, uninterrupted work at home, balanced with in-person collaboration and team engagement at the office.

Work Schedule: The role follows standard German business hours, typically around 40 hours per week. Flexibility is often provided, allowing for adjustments to accommodate personal needs, provided project deliverables and collaboration requirements are met. This flexibility is crucial for deep technical work that may require extended periods of concentration.

📝 Enhancement Note: The hybrid work model is standard for many engineering roles at large tech companies, balancing the need for focused individual work with the benefits of in-person collaboration and access to company resources.

📄 Application & Portfolio Review Process

Interview Process:

• Initial Screening: HR or a recruiter will likely conduct an initial phone screen to assess basic qualifications, cultural fit, and interest.

• Technical Interview(s): Expect multiple rounds of interviews with engineering managers and senior technical experts. These will delve deeply into your experience with compact modeling, device physics, Verilog-A, simulation tools, and problem-solving abilities. Be prepared to discuss specific projects and challenges.

• Case Study/Technical Challenge: A common element for senior engineering roles is a technical challenge or case study, which might involve analyzing a modeling problem, proposing a solution, or discussing a design approach. This could be presented during an interview or as a take-home assignment.

• Team/Cultural Fit Interview: An interview focused on assessing your collaboration style, communication skills, and how you align with Infineon's values and team dynamics.

• Final Interview: Potentially with a higher-level executive or Director to discuss strategic alignment and overall fit for the Principal Engineer role.

Portfolio Review Tips:

• Curate Select Examples: Focus on 2-3 of your most impactful projects that best showcase your skills in compact modeling, Verilog-A, optimization, and AI applications.

• Structure Your Narrative: For each project, clearly articulate the problem, your approach, the tools/methodologies used, the challenges faced, and the quantifiable results or improvements achieved (e.g., % improvement in convergence, accuracy gains).

• Highlight Key Technologies: Emphasize your experience with Si, SiC, MOSFETs, IGBTs, and Verilog-A. If you have AI modeling experience, make this a prominent feature.

• Demonstrate Process Thinking: Show how you've improved modeling processes, documentation, or efficiency.

• Be Ready to Discuss Code: Prepare to walk through snippets of Verilog-A code or discuss your approach to implementing complex models.

Challenge Preparation:

• Review Fundamentals: Refresh your knowledge of semiconductor device physics, MOSFET/IGBT operation, and compact modeling principles.

• Practice Verilog-A: Be ready to write or debug Verilog-A code for basic device models or specific features.

• Think Through Optimization: Prepare to discuss strategies for improving simulation convergence, reducing model complexity, or optimizing parameter extraction.

• AI Application Scenarios: Consider how AI could be applied to specific modeling challenges you've encountered.

• Communication: Practice articulating complex technical concepts clearly and concisely, as if explaining to a peer or manager.

📝 Enhancement Note: The interview process for a Principal Engineer will be rigorous, focusing heavily on deep technical expertise and the ability to lead and innovate. A strong portfolio demonstrating tangible results and a clear understanding of modeling processes is crucial.

🛠 Tools & Technology Stack

Primary Tools:

• Compact Modeling Languages: Verilog-A (essential), potentially Verilog-AMS, VHDL-AMS.

• Simulation Platforms: SPICE-based simulators (e.g., Cadence Spectre, Synopsys HSPICE, Silvaco SmartSpice), potentially advanced simulators for virtual prototyping.

• Device Physics & Modeling Software: Tools for device simulation (e.g., TCAD tools like Sentaurus, Atlas) for understanding device behavior and generating model parameters.

• Programming/Scripting Languages: Python (for scripting, data analysis, AI/ML), MATLAB (for data analysis, algorithm development), potentially C/C++ for custom model development or simulation engine interaction.

Analytics & Reporting:

• Data analysis tools for model validation and characterization data processing (e.g., Python libraries like Pandas, NumPy, SciPy; MATLAB).

• Visualization tools for presenting model performance and validation results (e.g., Matplotlib, Plotly, internal tools).

• Version control systems (e.g., Git) for managing model code and documentation. CRM & Automation:

• While not a traditional CRM role, efficient workflows and automation are key. This might involve scripting for batch simulations, automated parameter extraction routines, and data management.

• Knowledge of workflow automation tools or CI/CD principles applied to model development could be beneficial.

• Integration tools might be relevant for connecting simulation environments with data repositories or other development tools.

📝 Enhancement Note: Proficiency in Verilog-A and SPICE simulators is non-negotiable. Experience with Python and MATLAB for data analysis and scripting is highly valuable, especially given the emphasis on AI and optimization.

👥 Team Culture & Values

Operations Values:

• Innovation: A drive to explore and implement new modeling techniques, including AI, to push the boundaries of virtual prototyping.

• Accuracy & Reliability: A commitment to developing highly accurate and dependable compact models that accurately represent device behavior under various conditions.

• Efficiency: A focus on optimizing simulation performance, convergence, and development workflows to accelerate product cycles.

• Collaboration: A strong emphasis on teamwork, knowledge sharing, and supporting colleagues across different R&D and application teams.

• Customer Focus: Understanding the needs of application engineers and end-customers to ensure models are relevant and valuable.

• Quality: A meticulous approach to model implementation, validation, and documentation.

Collaboration Style:

• Proactive Communication: Regularly sharing updates, findings, and potential issues with team members and stakeholders.

• Constructive Feedback: Willingness to provide and receive constructive criticism to improve models and processes.

• Cross-Functional Partnership: Working closely with device physicists, application engineers, and other modeling groups to ensure alignment and achieve common goals.

• Knowledge Sharing: Actively participating in technical discussions, reviews, and potentially internal presentations or workshops.

• Problem-Solving Together: Tackling complex modeling challenges as a team, leveraging diverse expertise to find optimal solutions.

📝 Enhancement Note: Infineon's stated values of "trust, openness, respect and equal opportunity" are foundational. For this role, the team culture likely emphasizes technical excellence, continuous learning, and a collective drive to innovate in semiconductor technology.

⚡ Challenges & Growth Opportunities

Challenges:

• Complexity of Modern Devices: Developing accurate models for increasingly complex power semiconductor devices (e.g., advanced SiC MOSFETs with complex structures and behaviors) presents significant technical hurdles.

• Balancing Accuracy and Speed: Achieving high simulation accuracy while maintaining reasonable simulation runtimes is a perennial challenge in compact modeling.

• Integration of AI: Effectively integrating AI/ML techniques into established modeling workflows requires new skills, data handling strategies, and validation methodologies.

• Keeping Pace with Technology: The rapid evolution of semiconductor materials and device architectures demands continuous learning and adaptation of modeling approaches.

• Stakeholder Alignment: Ensuring that modeling strategies align with the diverse needs of different product lines and application teams can be complex.

Learning & Development Opportunities:

• Advanced Modeling Techniques: Deep dive into emerging modeling paradigms, such as AI-driven predictive modeling, physics-informed neural networks, and advanced electro-thermal co-simulation.

• New Materials and Devices: Gaining expertise in modeling next-generation semiconductor technologies beyond current SiC and GaN offerings.

• Industry Standards: Active participation in CMC and other industry groups offers opportunities to influence and learn about future modeling standards.

• Leadership and Mentorship: Developing skills in leading technical projects, mentoring junior engineers, and potentially transitioning into leadership roles.

• Conferences and Training: Access to leading industry conferences (e.g., IEDM, ESSDERC, GOMACTech) and specialized training courses on modeling and simulation.

📝 Enhancement Note: The challenges in this role are directly tied to the cutting edge of semiconductor technology. The growth opportunities are substantial for individuals who are passionate about technical mastery and innovation in this field.

💡 Interview Preparation

Strategy Questions:

• "Describe a time you developed a compact model that significantly improved simulation performance or accuracy. What was your approach, and what were the key results?" (Focus on process, methodology, and quantifiable outcomes.)

• "How would you approach modeling a novel parasitic effect in a high-voltage SiC device? What steps would you take, and what tools would you use?" (Assess problem-solving, technical depth, and strategic thinking.)

• "Discuss your experience with AI/ML in compact modeling. What are the benefits and limitations, and how would you integrate it into our existing Verilog-A development process?" (Evaluate understanding of new technologies and practical application.)

• "How do you ensure your compact models are portable and converge reliably across different simulation platforms and user environments?" (Probe understanding of practical modeling challenges and solutions.) Company & Culture Questions:

• "What interests you about Infineon and specifically this role in compact modeling and virtual prototyping?" (Research Infineon's mission, products, and recent news.)

• "How do you approach collaborating with application engineers or other stakeholders who may have different technical backgrounds?" (Highlight communication skills and stakeholder management.)

• "Describe a situation where you had to influence a technical decision or strategy. How did you approach it?" (Assess leadership and persuasion skills.)

• "How do you stay current with the latest advancements in semiconductor device physics and compact modeling?" (Demonstrate commitment to continuous learning.) Portfolio Presentation Strategy:

• Start with Impact: Begin by presenting your most significant project that aligns closely with Infineon's focus (e.g., SiC device modeling).

• Tell a Story: Frame each project as a narrative: the challenge, your innovative solution, the technical details, and the measurable positive outcome.

• Quantify Everything: Use numbers and data to support your claims – e.g., "reduced simulation time by 30%," "improved accuracy by X% over baseline model," "enabled simulation of Y application scenario."

• Showcase Verilog-A Expertise: Be prepared to discuss specific code implementations, optimization techniques within Verilog-A, or how you approached complex model equations.

• Highlight Process Improvement: If you improved a workflow, documented a process, or introduced a new methodology, make sure to articulate its benefits.

• Be Prepared for Deep Dives: Anticipate detailed technical questions about your projects and be ready to defend your choices and explain the underlying physics and modeling principles.

📝 Enhancement Note: The interview questions will be highly technical, requiring in-depth knowledge and the ability to articulate complex concepts clearly. The portfolio presentation is a critical component for demonstrating practical experience and impact.

📌 Application Steps

To apply for this Principal Engineer position at Infineon:

• Submit your application through the Infineon Careers portal via the provided URL.

• Tailor your Resume: Ensure your resume prominently features keywords related to compact modeling, Verilog-A, SPICE, device physics (Si, SiC), virtual prototyping, AI in modeling, and optimization techniques. Highlight your 10+ years of relevant experience and any leadership contributions.

• Prepare Your Portfolio: Curate 2-3 key projects that best demonstrate your expertise. Be ready to discuss them in detail, focusing on your methodology, tools used, challenges overcome, and quantifiable results.

• Research Infineon: Familiarize yourself with Infineon's product portfolio (especially power semiconductors, SiC devices), company values, and recent technological advancements. Understand their market position and strategic goals related to decarbonization and digitalization.

• Practice Interview Responses: Prepare for technical deep dives, behavioral questions, and scenario-based challenges. Practice articulating your experience and thought processes clearly and concisely, especially when discussing your portfolio projects.

• Network (Optional but Recommended): If possible, connect with current Infineon employees in R&D or modeling roles on LinkedIn to gain insights into the team culture and specific expectations.

⚠️ Important Notice: This enhanced job description includes AI-generated insights and operations industry-standard assumptions. All details should be verified directly with the hiring organization before making application decisions.