Senior Design Manager

📍 Job Overview

Job Title: Senior Design Manager Company: onsemi Location: Brno, South Moravia, Czech Republic Job Type: Full time Category: Engineering Management / Semiconductor Design Date Posted: January 15, 2026 Experience Level: Senior (10+ years) Remote Status: On-site

🚀 Role Summary

• Lead the architecture, development, and delivery of complex analog and mixed-signal Intellectual Property (IP) blocks, crucial for semiconductor innovation.
• Guide and mentor multi-disciplinary engineering teams, fostering a collaborative environment for high-quality IP delivery across various technology nodes.
• Drive the strategic direction for analog and mixed-signal design, with a strong preference for candidates experienced in Non-Volatile Memory (NVM), OTP, or embedded memory architectures.
• Ensure seamless integration and execution across design, verification, layout, product engineering, and technology development functions to meet project timelines and quality standards.

📝 Enhancement Note: This role is clearly focused on leading engineering teams within the semiconductor industry, specifically in analog and mixed-signal design. The emphasis on "IP blocks" and "technology nodes" points to a deep technical environment. The preference for NVM/embedded memory suggests a specialization within memory technologies.

📈 Primary Responsibilities

• Architect, design, and oversee the development of high-performance analog and mixed-signal circuits and IP blocks.
• Lead and manage cross-functional engineering teams, including design, verification, layout, and product engineering, to ensure successful project execution.
• Define and implement design methodologies, flows, and best practices to enhance efficiency, quality, and time-to-market for IP development.
• Collaborate closely with technology development teams to characterize and utilize new process technologies effectively for analog and mixed-signal designs.
• Drive technical discussions, provide expert guidance, and resolve complex design challenges to ensure the delivery of robust and competitive IP solutions.
• Mentor and develop junior and senior engineers within the design team, fostering their technical and leadership growth.
• Interface with product management and marketing teams to understand market requirements and translate them into technical specifications for new IP.
• Oversee the verification and validation strategies for analog and mixed-signal IP to ensure functional correctness and performance targets are met.
• Contribute to the strategic roadmap for analog and mixed-signal IP development within the organization, aligning with company objectives and market trends.
• Manage project timelines, resources, and budgets effectively to ensure on-time and within-budget delivery of IP projects.

📝 Enhancement Note: The responsibilities highlight a blend of technical leadership in analog/mixed-signal design and people management. The inclusion of "verification," "layout," "product engineering," and "technology development" indicates a comprehensive ownership of the IP lifecycle. The preference for NVM/embedded memory is reinforced by its mention in the primary responsibilities.

🎓 Skills & Qualifications

Education:

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field. A Ph.D. in a relevant discipline is a plus.

Experience:

• Minimum of 10 years of progressive experience in analog and mixed-signal integrated circuit (IC) design.
• Proven track record of successfully leading design teams and delivering complex semiconductor IP blocks from concept to production.
• Experience managing multi-disciplinary teams, including design, verification, layout, and product engineering.

Required Skills:

• Deep understanding of analog and mixed-signal circuit design principles and methodologies.
• Expertise in architectural design of analog and mixed-signal IP blocks.
• Strong knowledge of semiconductor fabrication processes and their impact on analog/mixed-signal performance.
• Proficiency in using industry-standard EDA tools for design, simulation, and layout (e.g., Cadence Virtuoso, Spectre, Synopsys).
• Experience with test and characterization of analog and mixed-signal circuits.
• Excellent leadership, communication, and interpersonal skills.
• Proven ability to manage complex projects, timelines, and resources.
• Experience in stakeholder management and cross-functional collaboration.

Preferred Skills:

• Specific experience in Non-Volatile Memory (NVM), OTP, or embedded memory architectures.
• Experience with advanced technology nodes (e.g., <10nm FinFET processes).
• Knowledge of digital design principles and Verilog/VHDL for mixed-signal integration.
• Familiarity with power management IC (PMIC) design, sensors, or data converters.
• Experience with scripting languages (e.g., Python, Perl) for design automation.

📝 Enhancement Note: The required skills are standard for a senior design management role in semiconductors. The "preferred skills" directly align with the role's specific focus on NVM/embedded memory and advanced technology nodes, indicating areas where candidates can significantly differentiate themselves.

📊 Process & Systems Portfolio Requirements

Portfolio Essentials:

• Showcase of successfully delivered analog and mixed-signal IP blocks, detailing their architecture, key performance metrics, and challenges overcome.
• Examples of process improvement initiatives led, demonstrating enhanced design efficiency, reduced cycle times, or improved IP quality.
• Documentation of system-level integration challenges and solutions for complex mixed-signal designs.
• Evidence of leadership in defining and implementing design flows, methodologies, and best practices.
• Case studies highlighting experience with NVM, OTP, or embedded memory architectures, if applicable.

Process Documentation:

• Demonstrated ability to document design processes, methodologies, and technical specifications clearly and comprehensively.
• Experience in creating and maintaining design documentation, including specifications, design reviews, and test reports.
• Examples of process optimization efforts, detailing the problem, proposed solution, implementation, and measured results (e.g., efficiency gains, defect reduction).

📝 Enhancement Note: For a management role, the portfolio should emphasize leadership, strategic decision-making, and team enablement, not just individual design contributions. The focus on process improvement and documentation is critical for demonstrating managerial capabilities.

💵 Compensation & Benefits

Salary Range:

• Estimated Range: €85,000 - €120,000 per annum (gross)
• Methodology: This estimate is based on prevailing compensation benchmarks for Senior Design Managers with 10+ years of experience in the semiconductor industry in major European tech hubs like Brno, Czech Republic. Factors considered include the technical specialization (analog/mixed-signal, NVM), leadership responsibilities, and the high-demand nature of semiconductor talent. This range can vary based on specific experience, qualifications, and negotiation.

Benefits:

• Comprehensive health insurance package (medical, dental, vision).
• Generous paid time off (vacation, holidays, sick leave).
• Retirement savings plan with company matching.
• Life insurance and disability coverage.
• Professional development opportunities, including training, conferences, and further education support.
• Relocation assistance for candidates moving to Brno.
• Employee stock purchase plan (ESPP) or stock options.
• On-site amenities (e.g., cafeteria, fitness center, depending on facility).
• Potential for performance-based bonuses and annual salary reviews.

Working Hours:

• Standard full-time work week, typically 40 hours, with flexibility often available for project needs.
• Core business hours are generally aligned with European time zones (e.g., 9:00 AM - 5:00 PM CET), with potential for adjusted schedules based on team collaboration and project demands.

📝 Enhancement Note: A specific salary range has been estimated based on industry standards for senior engineering management roles in Western/Central Europe, particularly in specialized fields like semiconductor design. Benefits are typical for a large, established tech company.

🎯 Team & Company Context

🏢 Company Culture

Industry: Semiconductor Manufacturing / High Technology Company Size: Large Enterprise (5,000+ employees) Founded: 1999 (onsemi) Company Description: onsemi is a leading manufacturer of intelligent power and sensing technologies, driving innovation in automotive and industrial end-markets. They are focused on accelerating megatrends like vehicle electrification, sustainable energy, industrial automation, and 5G/cloud infrastructure.

Team Structure:

• The Senior Design Manager will likely lead a team of highly skilled analog and mixed-signal design engineers, potentially ranging from 5 to 15 individuals.
• This team will operate within a larger engineering department, with potential dotted-line reporting to VPs or Directors of Engineering.
• Close collaboration is expected with other engineering disciplines such as verification, layout, DFT (Design for Test), product engineering, and process technology development.

Methodology:

• Data-driven decision-making and rigorous technical analysis are expected.
• Emphasis on structured design processes, including thorough design reviews, simulation, and verification.
• A culture of continuous improvement and innovation, encouraging the exploration of new technologies and methodologies.
• Collaborative problem-solving approach to tackle complex engineering challenges.

Company Website: https://www.onsemi.com/

📝 Enhancement Note: onsemi's focus on automotive and industrial markets, coupled with its size, suggests a stable yet innovative environment. The team structure implies cross-functional dependencies and a need for strong communication skills.

📈 Career & Growth Analysis

Operations Career Level: Senior Management / Principal Engineer This role represents a significant step into senior management within semiconductor design. It involves not only technical leadership in a specialized area (analog/mixed-signal, NVM) but also the responsibility for team performance, project delivery, and talent development. It's a critical role for driving innovation and ensuring the competitiveness of onsemi's IP portfolio.

Reporting Structure: The Senior Design Manager will likely report to a Director or Vice President of Engineering, with direct reports being Senior Design Engineers, Design Engineers, and potentially Verification/Layout leads for specific projects. The role requires effective communication and collaboration with peer managers in other engineering functions and with product management.

Operations Impact: The IP blocks developed under this manager's leadership directly impact the performance, efficiency, and functionality of onsemi's end products. Successful delivery of high-quality, innovative analog and mixed-signal IP is crucial for enabling key megatrends such as vehicle electrification, advanced safety features, and efficient power management, thus directly contributing to the company's revenue and market position.

Growth Opportunities:

• Technical Specialization: Deepen expertise in NVM, embedded memory, or other advanced analog/mixed-signal domains, potentially leading to Principal Engineer or Architect roles focusing on specific technology areas.
• Management Advancement: Progress to Director-level positions, overseeing larger teams or multiple design groups, with broader strategic responsibilities.
• Cross-Functional Leadership: Move into roles managing broader engineering functions or R&D initiatives that span multiple disciplines.
• Product Strategy: Transition into roles influencing product roadmaps and technology strategy based on deep technical and market insights.

📝 Enhancement Note: This role is positioned at a senior management level, offering significant impact and clear pathways for career progression within a large technology organization like onsemi.

🌐 Work Environment

Office Type: Corporate R&D Facility / Advanced Semiconductor Design Center Office Location(s): Brno, Czech Republic. This facility likely houses state-of-the-art design labs, simulation environments, and collaborative workspaces.

Workspace Context:

• Collaborative Environment: The workspace will be designed to foster collaboration among design engineers, verification specialists, layout designers, and product engineers, likely featuring open-plan areas, meeting rooms, and project-specific team zones.
• Technology Access: Engineers will have access to high-performance workstations, advanced EDA software licenses, and robust IT infrastructure necessary for complex chip design tasks.
• Team Interaction: Frequent team meetings, design reviews, and cross-functional sync-ups are integral to the daily workflow, ensuring alignment and efficient problem-solving.

Work Schedule:

• Standard 40-hour work week with core hours, but project deadlines may necessitate flexible working arrangements or occasional overtime. The on-site nature ensures full immersion in the collaborative design environment.

📝 Enhancement Note: The Brno location suggests a significant R&D hub, emphasizing a hands-on, collaborative, and technologically advanced work environment.

📄 Application & Portfolio Review Process

Interview Process:

• Initial Screening: HR or recruiter call to assess basic qualifications, interest, and cultural fit.
• Hiring Manager Interview: In-depth discussion with the hiring manager focusing on technical leadership, team management experience, and strategic thinking related to analog/mixed-signal design and NVM.
• Technical Panel Interview: A series of interviews with senior engineers, peers, and potentially stakeholders from related departments (e.g., verification, technology development) to evaluate technical depth, problem-solving skills, and architectural capabilities.
• Presentation/Case Study: Candidates may be asked to present a past project, a proposed solution to a hypothetical design challenge, or a strategy for managing a specific type of engineering team and project. This is where portfolio elements are crucial.
• Final Interview: Meeting with senior leadership (e.g., Director/VP of Engineering) for final assessment of leadership potential, strategic alignment, and overall fit.

Portfolio Review Tips:

• Highlight Leadership: Focus on projects where you led teams, defined strategy, or significantly influenced project outcomes. Quantify your impact using metrics.
• Process & Methodology: Detail your contributions to improving design flows, implementing best practices, and managing the full IP development lifecycle.
• Technical Depth: Be prepared to discuss the architecture, design choices, and technical challenges of your most significant analog/mixed-signal projects, especially those involving NVM or embedded memory.
• Problem-Solving: Present case studies that demonstrate your ability to tackle complex technical or managerial challenges and arrive at effective solutions.
• Clarity and Conciseness: Organize your portfolio logically, making it easy for interviewers to understand your contributions and impact.

Challenge Preparation:

• Design Architecture: Be ready to discuss how you would architect a specific analog or mixed-signal block, considering trade-offs in performance, power, and area.
• Team Management Scenarios: Prepare for questions about managing underperforming team members, resolving conflicts, motivating engineers, and prioritizing competing project demands.
• NVM/Memory Focus: If your experience aligns, be prepared for detailed questions about NVM/embedded memory design principles, reliability, and integration challenges.
• Strategic Thinking: Consider how you would align a design team's efforts with broader company goals in automotive and industrial markets.

📝 Enhancement Note: The interview process is structured to assess both technical leadership and management capabilities, with a strong emphasis on practical experience and strategic thinking relevant to semiconductor design.

🛠 Tools & Technology Stack

Primary Tools:

• EDA Suites: Cadence Design Suite (Virtuoso, Spectre, AMS Designer, Innovus/Genus for potential digital integration), Synopsys Design Compiler, PrimeTime, Custom Compiler.
• Simulation & Analysis: SPICE simulators (Spectre, HSPICE, Eldo), MATLAB/Simulink for system-level modeling and analysis.
• Layout Tools: Cadence Virtuoso Layout Suite, Synopsys IC Compiler.
• Verification Tools: Formal verification tools, mixed-signal verification environments.

Analytics & Reporting:

• Internal company-specific tools for project tracking, resource management, and performance reporting.
• Data analysis tools for performance metrics of IP blocks and team productivity.

CRM & Automation:

• While not a direct CRM role, understanding the customer/market needs is key.
• Scripting languages like Python, Perl, or Tcl for design automation, flow scripting, and data analysis.

📝 Enhancement Note: Proficiency with industry-standard EDA tools is paramount. The emphasis on scripting indicates a need for engineers who can automate tasks and improve design workflows.

👥 Team Culture & Values

Operations Values:

• Innovation: A drive to push the boundaries of semiconductor technology, especially in analog, mixed-signal, and memory domains.
• Excellence: Commitment to high-quality design, rigorous verification, and robust product delivery.
• Collaboration: Fostering a team-oriented environment where engineers work together effectively across disciplines to achieve shared goals.
• Integrity: Upholding ethical standards in all aspects of work, from design practices to team interactions.
• Customer Focus: Understanding and delivering on the needs of the automotive and industrial markets through cutting-edge technology.

Collaboration Style:

• Cross-Functional Integration: Emphasis on seamless communication and cooperation between analog design, verification, layout, product engineering, and technology development teams.
• Open Communication: Encouraging a culture where ideas can be freely shared, and constructive feedback is welcomed to drive continuous improvement.
• Problem-Solving Focus: A collective approach to identifying and resolving complex technical challenges, leveraging the diverse expertise within the team and across departments.

📝 Enhancement Note: onsemi's stated focus on automotive and industrial markets suggests a culture that values reliability, performance, and long-term partnerships, translating into a team culture focused on excellence and collaboration.

⚡ Challenges & Growth Opportunities

Challenges:

• Rapid Technological Evolution: Keeping pace with advancements in semiconductor technology nodes and evolving market demands requires continuous learning and adaptation.
• Complexity of Mixed-Signal Design: Integrating analog and digital components presents significant challenges in terms of signal integrity, power management, and verification.
• Talent Acquisition & Retention: Attracting and retaining top-tier analog and memory design talent in a competitive global market.
• Cross-Functional Alignment: Ensuring all engineering disciplines are aligned and working cohesively towards common project goals.

Learning & Development Opportunities:

• Advanced Technical Training: Access to specialized courses and workshops on cutting-edge analog, mixed-signal, and memory design techniques.
• Industry Conferences: Opportunities to attend and present at leading semiconductor conferences (e.g., ISSCC, VLSI Symposium, CICC).
• Leadership Development Programs: Formal training and mentorship programs focused on enhancing management and leadership skills.
• Exposure to New Technologies: Working with emerging technologies and process nodes, contributing to future product roadmaps.

📝 Enhancement Note: The challenges are typical for a senior role in a fast-paced, technology-driven industry. The growth opportunities are substantial, offering pathways for both technical and managerial advancement.

💡 Interview Preparation

Strategy Questions:

• "Describe a complex analog/mixed-signal IP you led from architecture to production. What were the key challenges, and how did you overcome them?" (Focus on your leadership, technical decisions, and team's success.)
• "How would you structure a design team to deliver high-performance NVM IP for automotive applications, ensuring quality and on-time delivery?" (Assess your understanding of team dynamics, process, and domain-specific requirements.)
• "Imagine a critical design flaw is discovered post-tapeout. How would you manage the situation, communicate with stakeholders, and implement a solution?" (Evaluate your crisis management, problem-solving, and communication skills.)

Company & Culture Questions:

• "What do you know about onsemi's focus on automotive and industrial markets, and how does your experience align with these sectors?" (Demonstrate research and understanding of the company's strategic direction.)
• "How do you foster a collaborative and innovative environment within your engineering team?" (Provide specific examples of your leadership style and team-building initiatives.)
• "How do you ensure your team stays updated with the latest advancements in analog design and memory technology?" (Showcase your commitment to continuous learning and development.)

Portfolio Presentation Strategy:

• Structure: Organize your presentation around 1-3 key projects that best showcase your leadership, technical expertise, and impact. Use a STAR (Situation, Task, Action, Result) format for each.
• Metrics: Quantify achievements whenever possible (e.g., performance improvements in %, power reduction in mW, area savings in mm², cycle time reduction in weeks).
• Technical Deep Dive: Be ready to elaborate on the technical details of your chosen projects, especially architectural decisions, design trade-offs, and complex problem-solving.
• NVM/Memory Focus: If applicable, dedicate a significant portion to your NVM/embedded memory experience, highlighting specific contributions and insights.
• Conciseness: Practice to ensure your presentation fits within the allotted time, leaving ample room for Q&A.

📝 Enhancement Note: Preparation should focus on demonstrating leadership, technical acumen in analog/mixed-signal and memory design, and strategic thinking aligned with onsemi's business objectives.

📌 Application Steps

To apply for this Senior Design Manager position:

• Submit your application through the provided Oracle Cloud job portal link.
• Portfolio Customization: Prepare a concise portfolio highlighting 2-3 key projects demonstrating your leadership in analog/mixed-signal IP development, with a specific focus on NVM/embedded memory if applicable. Quantify your impact.
• Resume Optimization: Tailor your resume to emphasize leadership experience, team management, project delivery, and technical expertise in analog/mixed-signal design, using keywords from the job description.
• Interview Preparation: Practice answering technical and behavioral questions, focusing on your leadership approach, problem-solving skills, and strategic thinking. Prepare specific examples from your experience.
• Company Research: Gain a deep understanding of onsemi's business, its focus on automotive and industrial markets, and its technological innovations. Research the Brno facility and its role within the company.

⚠️ Important Notice: This enhanced job description includes AI-generated insights and operations industry-standard assumptions. All details should be verified directly with the hiring organization before making application decisions.

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