ASIC Digital Design Manager

📍 Job Overview

Job Title: ASIC Digital Design Manager Company: Flux Location: Austin, Texas, United States Job Type: FULL_TIME Category: Engineering / Management & Leadership / Technology Date Posted: 2025-09-01T00:00:00 Experience Level: 10+ Years

🚀 Role Summary

• Lead end-to-end digital ASIC development, encompassing RTL design, synthesis, DFT/DFD, timing closure, and physical implementation for high-speed mixed-signal ASICs.
• Drive rigorous verification and silicon bring-up strategies to ensure first-time-right delivery of complex digital systems.
• Manage, mentor, and develop a high-performing team of 6-12 digital and mixed-signal engineers, fostering accountability and continuous improvement.
• Ensure seamless cross-functional collaboration across analog, verification, layout, packaging, firmware, and test teams, aligning efforts from architecture to production.

📝 Enhancement Note: This role is positioned as a critical leadership function within a hardware development team focused on cutting-edge AI technology. The emphasis on "execution ownership & speed," "right-first-time delivery," and "cross-functional alignment" indicates a need for strong process management and a proactive approach to project execution, typical of senior engineering management roles in fast-paced tech environments.

📈 Primary Responsibilities

• Oversee the complete lifecycle of digital subsystems for high-speed mixed-signal ASICs, from architectural definition through to tape-out and mass production, with a keen focus on aggressive schedule adherence and quality outcomes.
• Implement and champion robust design, verification, and silicon bring-up methodologies to achieve first-silicon success and minimize costly respins.
• Provide direct line management, including setting performance goals, conducting reviews, facilitating career development, and managing hiring for the digital engineering team.
• Cultivate a culture of accountability, continuous improvement, and efficient knowledge sharing to enhance team performance and delivery speed.
• Act as a key technical authority, offering architectural and implementation guidance for complex digital subsystems, including multi-lane data paths, advanced clocking schemes, and critical mixed-signal control interfaces.
• Drive strategic program leadership by defining and tracking project schedules, managing resource allocation, identifying and mitigating risks, and maintaining clear communication channels with executive stakeholders.
• Foster strong partnerships with analog, verification, layout, firmware, and test teams to ensure integrated program execution and alignment across all development phases.
• Champion the adoption of design automation tools and streamlined methodologies to accelerate the development process while maintaining high standards of silicon quality.

📝 Enhancement Note: The responsibilities highlight a dual focus on technical leadership and people management. The emphasis on "execution ownership & speed" and "right-first-time delivery" suggests that candidates will be evaluated on their ability to deliver complex projects efficiently and with minimal errors, a core tenet of successful ASIC development management.

🎓 Skills & Qualifications

Education: While not explicitly stated, a Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field is typically expected for ASIC design management roles.

Experience: A minimum of 10 years of progressive experience in digital ASIC development is required, with a demonstrated history of successfully completing at least three full product cycles from initial specification to high-volume production.

Required Skills:

• Proven track record in driving on-time, first-time-right delivery of complex, high-performance ASICs, particularly those with mixed-signal interfaces such as SerDes, DACs/ADCs, RF SoCs, or display/camera pipelines.
• Extensive expertise in RTL design using SystemVerilog/Verilog, coupled with a deep understanding of Clock Domain Crossing (CDC) and Reset Domain Crossing (RDC) analysis.
• Proficiency in Static Timing Analysis (STA), logic synthesis, Place & Route (P&R) methodologies, and power intent specifications (UPF/CPF).
• Hands-on experience with Design for Test (DFT) and Design for Debug (DFD) techniques and methodologies.
• Solid understanding of mixed-signal interactions, including signal coupling, jitter analysis, supply noise impact, and calibration strategies, with the ability to effectively collaborate with analog teams on specification partitioning.
• Demonstrated success in line management, including hiring, mentoring, performance management, and career development of engineering teams.
• Exceptional program leadership skills, with a proven ability to manage aggressive schedules, allocate resources effectively, identify and mitigate project risks, and manage vendor/foundry relationships.
• Outstanding written and verbal communication skills, with the ability to present clear, concise program and technical status updates to executive leadership, customers, and cross-functional teams.

Preferred Skills:

• Experience with advanced process nodes and their associated design challenges.
• Familiarity with optical processor technologies and their integration within AI systems.
• Knowledge of AI model training and inference pipelines.

📝 Enhancement Note: The skill set emphasizes a blend of deep technical expertise in the ASIC design flow and strong leadership capabilities. The requirement for "3 full product cycles" and experience with "mixed-signal interfaces" points towards a need for candidates who have managed complex, real-world silicon projects from inception to mass production, highlighting the practical, execution-focused nature of the role.

📊 Process & Systems Portfolio Requirements

Portfolio Essentials:

• Demonstrate successful project delivery through comprehensive case studies showcasing complex digital ASIC subsystem development from specification to tape-out and production.
• Provide evidence of first-time-right silicon success, detailing methodologies used to achieve this and the resulting impact on project timelines and costs.
• Showcase experience in managing and mentoring engineering teams, including examples of performance improvement plans, hiring successes, and career development initiatives.
• Illustrate proficiency in cross-functional collaboration, with examples of how you've aligned diverse teams (analog, verification, layout, firmware, test) to achieve common project goals.
• Present evidence of effective program management, including schedule management, risk mitigation strategies, and clear executive communication, ideally through project summaries or status reports.

Process Documentation:

• Detailed documentation of your approach to RTL design, synthesis, and STA flow, highlighting any automation or optimization techniques employed.
• Examples of rigorous verification strategies and methodologies used to ensure design correctness and meet functional requirements.
• Documentation of DFT/DFD implementation and its impact on testability and debug efficiency.
• Case studies illustrating how you've managed mixed-signal interactions and collaborated with analog teams to define effective specification splits and integration plans.

📝 Enhancement Note: While a formal "portfolio" isn't explicitly requested, the job description heavily implies the need for candidates to showcase their past successes and methodologies through detailed project examples during the interview process. The emphasis on "execution speed," "first-time-right delivery," and "cross-functional alignment" suggests that a strong understanding and application of robust engineering processes will be a key evaluation criterion.

💵 Compensation & Benefits

Salary Range: $221,000 – $270,000 per year.

Benefits:

• Competitive stock options, providing ownership in the company's success.
• Health insurance stipend of $800/month, transitioning to a group policy covering 100% of employee premiums with options for dental, vision, and life insurance.
• 401(k) retirement savings plan, with plans to introduce an employer match in line with Austin tech market norms (4-5% range).
• 33 days of paid time off (PTO), inclusive of US federal holidays.
• Financial and operational relocation support for moves to Austin.
• Visa sponsorship available for eligible candidates.
• High-spec technology, including noise-cancelling headphones and ergonomic setups.
• Personal company card for work-related tools and software (e.g., ChatGPT Pro).
• Periodic travel opportunities to London HQ.
• A location bonus of $24K for employees living within 20 minutes of the office.

Working Hours: While not explicitly defined, standard full-time working hours are assumed (e.g., 40 hours per week), with an emphasis on fast-paced execution and meeting aggressive targets.

📝 Enhancement Note: The salary range provided is competitive for a management role with this level of technical expertise and responsibility in the Austin tech market. The benefits package is comprehensive, reflecting a startup environment that aims to be competitive with established tech companies, particularly with the inclusion of stock options, relocation support, and a generous PTO policy. The location bonus is a unique incentive for local hires.

🎯 Team & Company Context

🏢 Company Culture

Industry: Technology, specifically AI Hardware Acceleration (Optical Processors). Flux Computing is at the forefront of designing and manufacturing optical processors for training and running inference on large AI models. This positions them in a rapidly evolving and highly competitive sector. Company Size: The job posting mentions a team of 6-12 engineers for the digital design team, and the company is likely in a growth phase, indicating a dynamic startup environment. The mention of setting up a US group policy once they have 5+ employees suggests they are past the very early startup phase but still scaling. Founded: Flux Computing is a relatively new company, likely founded within the last 5-10 years, focusing on disruptive technology in the AI hardware space. This implies a culture that values innovation, agility, and rapid iteration.

Team Structure:

• The digital design team consists of 6-12 engineers, implying a focused and specialized unit within the broader engineering department.
• This role reports into a higher level of engineering management or directly to executive leadership, given the scope of responsibilities and the need for program leadership communication.
• Close collaboration is expected with analog design, verification, physical design (layout), packaging, firmware, and test teams, underscoring a highly integrated, cross-functional approach to ASIC development.

Methodology:

• Emphasis on data-driven decision-making, particularly concerning design choices, verification coverage, and performance metrics.
• A strong focus on process optimization and automation to accelerate development cycles and ensure high-quality, "right-first-time" silicon delivery.
• Agile and iterative development practices are likely employed to adapt quickly to the fast-paced AI hardware landscape.

Company Website: https://www.fluxcomputing.com

📝 Enhancement Note: Flux Computing appears to be a well-funded, forward-thinking startup in the AI hardware space. The culture is likely to be fast-paced, demanding, and highly collaborative, attracting individuals passionate about cutting-edge technology and rapid innovation. The emphasis on speed and quality in ASIC development suggests a culture that values both execution efficiency and technical excellence.

📈 Career & Growth Analysis

Operations Career Level: This role is at a senior management level within the engineering function, specifically leading the digital ASIC design team. It requires a blend of deep technical expertise and proven people management skills. The scope includes end-to-end responsibility for digital subsystems, making it a pivotal role in product development.

Reporting Structure: The ASIC Digital Design Manager will likely report to a VP of Engineering, CTO, or a similar senior leadership position. They will manage a team of digital and mixed-signal engineers, and collaborate closely with managers and leads of other engineering disciplines (analog, verification, etc.).

Operations Impact: The successful execution of digital subsystems directly impacts the performance, functionality, and time-to-market of Flux's optical processors. This role is critical for delivering the core technology that powers their AI solutions, thus having a significant influence on the company's product strategy, competitive positioning, and revenue generation potential.

Growth Opportunities:

• Technical Specialization: Opportunity to deepen expertise in high-speed mixed-signal ASIC design and optical processor architectures.
• Leadership Expansion: Potential to grow into a broader engineering management role, overseeing larger teams or multiple functional areas as the company scales.
• Strategic Influence: As a key technical leader, there's an opportunity to influence architectural decisions, technology roadmaps, and overall engineering strategy.
• Company Growth: As a fast-growing startup, there are opportunities for significant career advancement and impact as the company expands its product portfolio and market presence.

📝 Enhancement Note: This role offers a significant opportunity for career advancement within a high-growth, innovative tech company. The combination of technical leadership and people management, coupled with direct impact on core product development, positions it as a strategic career move for experienced ASIC design professionals. The ability to shape team processes and contribute to architectural direction provides substantial growth potential.

🌐 Work Environment

Office Type: The job posting mentions working from their office in "The Domain, right in buzzing Austin." This suggests a modern, likely open-plan or collaborative office space conducive to teamwork and innovation, typical of tech companies in Austin.

Office Location(s): The primary office is located in Austin, Texas, specifically in The Domain area, known for its concentration of tech companies and amenities.

Workspace Context:

• The environment is described as "fast-paced" and "high-energy," implying a dynamic and demanding workplace.
• Close collaboration with cross-functional teams is a key aspect, suggesting an environment that encourages interaction and knowledge sharing.
• Employees are provided with high-spec technology, noise-cancelling headphones, and ergonomic setups, indicating a focus on productivity and employee comfort.
• A "personal company card" for tools like ChatGPT Pro suggests a culture that empowers employees to leverage resources that enhance their workflow and efficiency.

Work Schedule: While not explicitly stated, standard full-time working hours are expected. However, the emphasis on "execution speed" and "aggressive schedule targets" may imply a need for flexibility and dedication beyond typical 9-to-5, common in startup environments.

📝 Enhancement Note: The work environment at Flux is likely to be stimulating and challenging, characteristic of a high-growth tech startup. The emphasis on collaboration, cutting-edge technology, and employee support (through equipment and tools) aims to create a productive and engaging atmosphere. Candidates should be prepared for a dynamic pace and a strong focus on achieving ambitious goals.

📄 Application & Portfolio Review Process

Interview Process:

• Initial Screening: Likely involves a review of your resume and a brief call with HR or a recruiter to assess basic qualifications and cultural fit.
• Technical/Hiring Manager Interviews: Expect in-depth discussions covering your ASIC design experience, team management philosophies, project execution strategies, and technical expertise in RTL, synthesis, STA, and mixed-signal integration. You'll likely be asked to walk through specific projects from your past.
• Team Interviews: You may meet with members of the digital design team and other cross-functional leads to assess your collaboration style and technical depth.
• Executive/Final Interviews: A final conversation with senior leadership to discuss strategic vision, leadership approach, and overall fit with the company’s direction.

Portfolio Review Tips:

• Focus on Impact: When discussing projects, emphasize the impact of your work on silicon success, schedule adherence, and team performance. Quantify achievements whenever possible (e.g., "reduced timing closure iterations by X%", "achieved first-silicon success with Y% fewer bugs").
• Highlight Management Philosophy: Be prepared to articulate your approach to team building, performance management, mentorship, and fostering a positive, productive work environment. Use specific examples.
• Demonstrate Process Rigor: Showcase your understanding and implementation of robust ASIC development processes, including verification strategies, DFT/DFD planning, and collaboration with analog/layout teams.
• Structure Your Narrative: For each key project, clearly define the problem, your role and approach, the solutions implemented, and the measurable results. Tailor your examples to the responsibilities outlined in the job description.
• Prepare for Technical Deep Dives: Be ready to discuss technical challenges encountered in past projects and how you and your team overcame them, particularly concerning high-speed interfaces and mixed-signal interactions.

Challenge Preparation:

• While a specific "challenge" isn't detailed, be prepared for potential technical problem-solving scenarios or case studies related to ASIC design, team management, or project execution under tight deadlines.
• Practice articulating your thought process clearly and concisely, especially when discussing trade-offs and decision-making in complex engineering environments.
• Be ready to discuss how you would approach building or improving a team, driving collaboration, or resolving technical roadblocks.

📝 Enhancement Note: The interview process is likely to be rigorous, focusing on both technical acumen and leadership capabilities. Candidates should prepare to provide detailed examples of past project successes, management style, and problem-solving approaches, aligning them with the company's emphasis on speed, quality, and cross-functional collaboration.

🛠 Tools & Technology Stack

Primary Tools:

• RTL Design: SystemVerilog, Verilog.
• Synthesis: Synopsys Design Compiler, Cadence Genus.
• Static Timing Analysis (STA): Synopsys PrimeTime, Cadence Tempus.
• Place & Route (P&R): Synopsys IC Compiler II, Cadence Innovus.
• Power Analysis: Synopsys VCS, Cadence Xcelium (for UPF/CPF simulation).
• DFT/DFD Tools: Synopsys TetraMAX, Mentor Graphics Tessent.
• Version Control: Git, Perforce.
• Project Management: Tools like Jira, Asana, or similar for tracking tasks, schedules, and risks.

Analytics & Reporting:

• While specific tools aren't listed, expect to use reporting features within synthesis and STA tools, and potentially custom scripts or internal dashboards for tracking team progress, design metrics, and project status.

CRM & Automation:

• Not directly applicable to this hardware engineering role, but proficiency with project management and collaboration tools is essential for workflow automation and team efficiency.

📝 Enhancement Note: Proficiency with industry-standard EDA (Electronic Design Automation) tools for RTL design, synthesis, STA, P&R, and DFT is critical. Experience with advanced process nodes and mixed-signal integration tools would be advantageous. Familiarity with project management and version control systems is also expected for effective team execution.

👥 Team Culture & Values

Operations Values:

• Speed & Execution: A core value is delivering results rapidly and efficiently, reflecting the dynamic nature of the AI hardware industry and startup environment.
• Quality & Precision: A commitment to "right-first-time" delivery underscores the importance of meticulous design, rigorous verification, and high-quality silicon.
• Collaboration & Alignment: Strong emphasis on seamless teamwork across different engineering disciplines to ensure integrated product development.
• Accountability & Ownership: Team members are expected to take ownership of their work, drive projects forward, and be accountable for outcomes.
• Continuous Improvement: A culture that encourages learning, process refinement, and adoption of new methodologies to enhance efficiency and effectiveness.

Collaboration Style:

• Cross-Functional Integration: Expect a highly collaborative environment where engineers from different domains work closely together, sharing knowledge and problem-solving.
• Open Communication: A culture of clear, concise, and proactive communication is crucial for managing complex projects and aligning diverse teams.
• Feedback Loop: Encouragement of constructive feedback and knowledge sharing to foster collective learning and process improvement.
• Goal Alignment: Team efforts are directed towards shared project objectives and company milestones, with a focus on collective success.

📝 Enhancement Note: The company culture appears to value a blend of high-octane execution and technical excellence. The emphasis on collaboration and accountability suggests a team-oriented environment where individual contributions are valued within the context of collective project success. Candidates should be comfortable in a fast-paced setting that rewards proactive contribution and strong teamwork.

⚡ Challenges & Growth Opportunities

Challenges:

• Aggressive Timelines: Meeting demanding schedules for complex ASIC development projects in a rapidly evolving AI market.
• Mixed-Signal Integration Complexity: Effectively managing the interaction and integration challenges between digital and analog/mixed-signal components.
• Team Scaling: Growing and managing a high-performing engineering team while maintaining quality and speed during rapid company expansion.
• First-Silicon Success: Consistently achieving first-time-right silicon for complex designs, requiring meticulous planning and execution.
• Technological Advancement: Staying abreast of and implementing the latest advancements in ASIC design methodologies, tools, and AI hardware technologies.

Learning & Development Opportunities:

• Advanced ASIC Methodologies: Gaining hands-on experience with cutting-edge techniques in high-speed digital design, mixed-signal integration, and silicon validation.
• AI Hardware Architecture: Deepening understanding of how digital subsystems contribute to the performance of optical processors for AI applications.
• Leadership Development: Opportunities for formal and informal training in people management, strategic planning, and cross-functional leadership.
• Industry Exposure: Potential to attend industry conferences and engage with peers in the AI hardware and semiconductor design communities.

📝 Enhancement Note: This role presents exciting challenges in a cutting-edge field, offering significant opportunities for professional growth. The primary challenges revolve around managing complex technical projects under tight deadlines and leading a growing team, while the growth opportunities lie in advancing technical expertise and leadership skills within a high-impact organization.

💡 Interview Preparation

Strategy Questions:

• Project Execution: "Describe a complex ASIC project you managed from start to finish. What were the key challenges, how did you ensure on-time and first-time-right delivery, and what was the outcome?" (Focus on process, risk mitigation, and team leadership).
• Team Management: "How do you approach building, mentoring, and managing a high-performing engineering team? Provide examples of how you've handled performance issues or facilitated career growth." (Highlight your leadership philosophy and practical application).
• Cross-Functional Collaboration: "How do you ensure effective collaboration between digital, analog, verification, and other teams? Describe a situation where you had to bridge communication gaps or resolve conflicts between disciplines." (Emphasize communication strategies and partnership building).
• Technical Approach: "Walk me through your process for RTL design, synthesis, and timing closure for a high-speed digital interface. What are your key considerations for mixed-signal integration?" (Demonstrate technical depth and methodology).

Company & Culture Questions:

• "What interests you about Flux Computing and our mission in AI hardware?" (Research the company's technology, vision, and recent news).
• "How do you thrive in a fast-paced, high-growth startup environment?" (Align your work style with the company's culture of speed and innovation).
• "How do you foster a culture of quality and accountability within your team?" (Connect your values to those of the company).

Portfolio Presentation Strategy:

• Impact-Driven Storytelling: Structure your project examples as compelling narratives that highlight the problem, your solution, and the quantifiable results achieved. Focus on your leadership role in driving these outcomes.
• Process Clarity: Clearly articulate the methodologies, tools, and workflows you employed, especially those that contributed to speed and quality.
• Data Visualization: If possible, use simplified diagrams or charts to illustrate complex technical concepts or project timelines.
• Conciseness and Confidence: Practice delivering your presentation smoothly, confidently, and within a reasonable timeframe, anticipating follow-up questions.
• Showcase Management Skills: Integrate examples of team management, mentoring, and cross-functional collaboration into your project discussions.

📝 Enhancement Note: Preparation should focus on demonstrating a strong understanding of the ASIC development lifecycle, proven leadership capabilities, and an alignment with Flux's culture of speed and quality. Be ready to provide specific, data-backed examples that showcase your ability to manage complex projects and lead engineering teams effectively.

📌 Application Steps

To apply for this ASIC Digital Design Manager position:

• Submit your application through the provided Ashby link.
• Resume Optimization: Tailor your resume to highlight your 10+ years of digital ASIC development experience, specifically mentioning full product cycles (spec-to-production), mixed-signal interface projects, and leadership roles. Quantify achievements wherever possible.
• Portfolio Preparation: Mentally prepare detailed case studies for your most relevant ASIC projects, focusing on your management contributions, execution strategies, and outcomes related to speed and quality. Be ready to discuss your team management philosophy and cross-functional collaboration approach.
• Technical Refresh: Review key ASIC design concepts, including RTL design (SystemVerilog/Verilog), synthesis, STA, DFT/DFD, and mixed-signal integration challenges.
• Company Research: Familiarize yourself with Flux Computing's mission, technology (optical processors for AI), and recent developments. Understand their position in the AI hardware market.
• Practice Communication: Prepare to articulate your technical and leadership experience clearly and concisely, practicing your responses to common interview questions focused on project management, team leadership, and technical problem-solving.

⚠️ Important Notice: This enhanced job description includes AI-generated insights and operations industry-standard assumptions. All details should be verified directly with the hiring organization before making application decisions.