Analog/Mixed-Signal IC Design Manager | High Performance Radar

Texas Instruments
Full-timeDallas, United States

📍 Job Overview

Job Title: Analog/Mixed-Signal IC Design Manager | High Performance Radar

Company: Texas Instruments

Location: Dallas, Texas, United States

Job Type: Full-Time

Category: Engineering Management / IC Design

Date Posted: 2026-09-09

Experience Level: Mid-Senior Level (7+ years)

Remote Status: On-site

🚀 Role Summary

  • Lead a team of 3-5 early-career analog design engineers in the development of best-in-class analog and mixed-signal IPs for mmWave radar front-end sub-systems.

  • Drive architectural analysis and design implementation, balancing power, performance, and die area metrics for high-performance radar applications.

  • Oversee rigorous verification processes to ensure first-pass silicon success and contribute to defining the IC design R&D roadmap for market-leading products.

  • Act as a technical leader, providing guidance on future product development and potentially engaging in direct customer technical discussions.

  • Responsible for personnel selection, development, and evaluation to ensure efficient team operation and business success.

📝 Enhancement Note: This role is explicitly for an Analog/Mixed-Signal IC Design Manager within Texas Instruments' High-Performance Radar (HPR) business unit. The focus is on leading a team to design critical IPs like PLLs, ADCs, DACs, filters, and LDOs for mmWave radar front-ends, emphasizing a blend of technical leadership, architectural strategy, and team management for early-career engineers.

📈 Primary Responsibilities

  • Manage and mentor a team of 3-5 analog/mixed-signal IC design engineers, fostering their technical growth and ensuring timely delivery of IP blocks.

  • Translate system-level requirements for automotive and industrial mmWave radar applications into detailed analog/mixed-signal IC design specifications.

  • Conduct and guide architectural analysis for analog IPs (e.g., PLLs, ADCs, DACs, filters, LDOs) to optimize for power, performance, and area (PPA).

  • Oversee the full IC design flow, including schematic capture, layout supervision, and comprehensive simulation/verification strategies using industry-standard EDA tools.

  • Lead post-silicon validation efforts, analyze performance reports from validation and product engineering teams, and direct debug activities to resolve any silicon issues.

  • Contribute to the strategic R&D roadmap for High-Performance Radar products, identifying new design techniques and IP opportunities to maintain market leadership.

  • Collaborate closely with cross-functional teams, including system engineers, SoC designers, verification engineers, and product engineers, to ensure seamless integration and successful product launches.

  • Engage with customers on deep technical topics when required, representing TI's technical expertise in analog/mixed-signal IC design for radar applications.

  • Drive continuous improvement in design methodologies, verification techniques, and team processes to enhance efficiency and first-pass success rates.

  • Develop and evaluate team members, identifying training needs and career development opportunities to build a high-performing analog design team.

📝 Enhancement Note: The primary responsibilities clearly indicate a management role with significant technical oversight. The emphasis on "early career engineers" implies a strong mentoring and development component. The need to translate "system-level requirements" into "analog/mixed-signal IC design specifications" highlights the critical link between product needs and detailed silicon design.

🎓 Skills & Qualifications

Education:

  • Master's degree in Electrical Engineering with a focus on Analog IC design.

  • PhD degree in Electrical Engineering with a focus on Analog IC design (Preferred). Experience:

  • 7+ years of experience in analog and mixed-signal nanometer CMOS IC design.

  • Demonstrated experience in design ownership of multiple analog/mixed-signal IPs, with a strong preference for experience with PLLs or data converters.

  • Proven experience in leading and mentoring young design engineers (0-5 years of experience) on design and debug methodologies, and ensuring on-time IP delivery. Required Skills:

  • Deep understanding of analog and mixed-signal circuit design principles in nanometer CMOS technologies.

  • Expertise in designing and verifying key analog IPs such as Phase-Locked Loops (PLLs), Analog-to-Digital Converters (ADCs), Digital-to-Analog Converters (DACs), filters, and Low-Dropout Regulators (LDOs).

  • Proficiency in architectural analysis and trade-off studies for power, performance, and area (PPA).

  • Experience with semiconductor design flows, including schematic capture, layout, simulation, and verification tools (e.g., Cadence Virtuoso, Spectre, HSPICE, Verilog-A).

  • Strong understanding of system-level requirements for radar applications and their impact on analog IP design.

  • Experience with lab measurements, characterization, and post-silicon debug methodologies.

  • Proven leadership and team management capabilities, with a focus on developing and guiding early-career engineers.

  • Excellent analytical and problem-solving skills.

  • Strong verbal and written communication skills, with the ability to articulate complex technical concepts clearly. Preferred Skills:

  • Experience with mmWave (77GHz and 60GHz) radar front-end architectures and sub-systems.

  • Familiarity with FMCW radar principles and their analog design implications.

  • Experience with advanced packaging techniques relevant to mmWave RFICs.

  • Ability to quickly ramp on new systems, processes, and technologies.

  • Demonstrated ability to establish strong relationships with cross-functional stakeholders and drive results.

  • Experience with EDA tools for advanced process nodes and mixed-signal simulation.

📝 Enhancement Note: The requirements emphasize a strong foundation in analog/mixed-signal design within nanometer CMOS, specifically for high-frequency radar applications. The "Manager" title is reinforced by the need for "mentoring young design engineers" and "design ownership of multiple IPs." The preference for PLL or data converter experience points to core competencies expected for this role.

📊 Process & Systems Portfolio Requirements

Portfolio Essentials:

  • Showcase a minimum of 2-3 complex analog or mixed-signal IC design projects where you held significant design ownership and accountability.

  • For each project, clearly articulate the system-level requirements, architectural choices, design challenges, and the implemented solutions.

  • Include detailed analysis of performance metrics achieved (e.g., power consumption, noise figure, linearity, bandwidth, resolution, settling time) against specifications, with clear data visualization.

  • Provide evidence of successful verification strategies and simulation results, demonstrating a robust design process.

  • If applicable, include examples of post-silicon validation results and any debug activities undertaken, highlighting problem-solving approaches. Process Documentation:

  • Demonstrate a structured approach to analog IC design, from initial specification to tape-out and validation.

  • Outline your methodologies for architectural exploration, trade-off analysis, and IP block selection.

  • Detail your experience with design-for-test (DFT) and design-for-manufacturability (DFM) considerations in nanometer CMOS processes.

  • Provide examples of how you manage design reviews, track progress, and ensure adherence to project timelines and quality standards.

  • Illustrate your approach to technical documentation, including design specifications, verification plans, and technical reports.

📝 Enhancement Note: For a management role focused on IC design, a portfolio is crucial. It needs to demonstrate not just individual technical contribution but also an understanding of the design lifecycle, quality assurance, and the ability to manage complex projects. The emphasis on "post-silicon validation" and "debug" is particularly important for a manager responsible for ensuring silicon success.

💵 Compensation & Benefits

Salary Range:

Based on industry benchmarks for an Analog/Mixed-Signal IC Design Manager with 7+ years of experience in Dallas, Texas, the estimated annual salary range is $170,000 - $240,000 USD. This range accounts for the specialized technical expertise, management responsibilities, and the high cost of living in the Dallas metropolitan area. The final compensation will be determined by the candidate's specific experience, qualifications, and performance during the interview process.

Benefits:

  • Competitive Pay: Includes base salary, potential for annual bonuses, and stock grants, reflecting TI's commitment to rewarding talent.

  • Comprehensive Health & Wellness: Medical, dental, and vision insurance plans, as well as wellness programs and resources.

  • Retirement Savings: 401(k) plan with company match, designed to support long-term financial security.

  • Career Development: Opportunities for continuous learning through internal training, external courses, conferences, and access to technical resources.

  • Work-Life Balance: Paid time off, holidays, and flexible work arrangements where applicable, supporting employee well-being.

  • Employee Stock Purchase Plan (ESPP): Opportunity to purchase TI stock at a discounted rate.

  • Relocation Assistance: Available for qualified candidates moving to the Dallas area.

Working Hours:

The standard working hours for this on-site role are typically 40 hours per week, Monday through Friday. However, given the demanding nature of IC design and management, flexibility may be required to meet project deadlines and critical milestones, including occasional extended hours or weekend work.

📝 Enhancement Note: Salary estimates for specialized engineering management roles in major tech hubs like Dallas are provided. The benefits listed are standard for large technology companies and are tailored to appeal to experienced professionals seeking stability and growth. The mention of potential extended hours is realistic for an IC design manager role.

🎯 Team & Company Context

🏢 Company Culture

Industry: Semiconductor Manufacturing and Design. Texas Instruments is a global leader in designing and manufacturing analog and embedded processing chips essential for a vast array of electronic products.

Company Size: Large Enterprise (TI has over 33,000 employees globally). This size offers stability, extensive resources, and opportunities for diverse career paths, while also presenting a structured environment for management and operations.

Founded: 1930. With a long history, TI has a deep-rooted culture of innovation, reliability, and continuous improvement, which influences its approach to product development and team management.

Team Structure:

  • Operations Focus: The High-Performance Radar (HPR) business unit likely operates with a matrixed structure, where the design manager leads a dedicated team of analog IC engineers. This team will collaborate closely with system architects, digital design teams, verification engineers, product engineers, and marketing.

  • Reporting Structure: The Analog/Mixed-Signal IC Design Manager will report to a higher-level engineering director or VP within the HPR division. The team members report directly to the manager.

  • Cross-functional Collaboration: Expect robust collaboration with system engineering (defining radar requirements), digital IC design (integrating analog IPs into SoCs), verification teams (ensuring functional correctness), product engineering (driving silicon to market), and marketing/applications (understanding customer needs and competitive landscape).

Methodology:

  • Data-Driven Design: Decisions regarding architecture, design choices, and verification strategies are heavily data-driven, relying on simulations, analysis, and empirical results.

  • Process Optimization: Continuous focus on refining the IC design flow, improving verification methodologies, and streamlining the hand-off between design stages to maximize efficiency and reduce time-to-market.

  • Innovation & Research: A significant portion of the R&D effort is dedicated to exploring new design techniques, materials, and architectures to maintain TI's technological edge in mmWave radar.

Company Website: https://www.ti.com/

📝 Enhancement Note: The context provided by TI's industry, size, and history suggests a culture that values deep technical expertise, long-term vision, and rigorous process. The team structure implies a need for strong interpersonal and collaborative skills beyond pure technical leadership.

📈 Career & Growth Analysis

Operations Career Level: This role represents a significant step into technical management within the semiconductor IC design field. It moves beyond individual contribution to leading and developing a team of specialists. The scope includes direct responsibility for critical IP development, influencing product roadmaps, and managing personnel.

Reporting Structure: The manager will report to a senior engineering director or VP, providing regular updates on team performance, project status, and strategic initiatives. This position requires effective communication upwards to secure resources and align on objectives.

Operations Impact: The work of this team directly impacts the performance, cost, and time-to-market of TI's mmWave radar products. Successful IP development and integration are critical for maintaining TI's competitive advantage in automotive and industrial markets, directly contributing to revenue generation and market share growth.

Growth Opportunities:

  • Technical Leadership: Progress to a senior manager or director role, overseeing larger teams or multiple product lines within the HPR division. Potential to become a principal engineer or chief architect in a specialized area.

  • Product Line Management: Transition into roles that involve broader product strategy, market analysis, and business development for the radar product portfolio.

  • Cross-Functional Leadership: Opportunities to lead broader R&D initiatives or move into roles that require deep technical consultation across different business units.

  • Specialization: Deepen expertise in specific analog/mixed-signal domains (e.g., RF, high-speed data converters, advanced PLLs) and become a recognized subject matter expert within TI and the industry.

📝 Enhancement Note: The growth trajectory for this role clearly points towards senior leadership within TI's engineering organization or specialized technical expert paths. The emphasis on "operations impact" highlights how this technical management role contributes directly to business success.

🌐 Work Environment

Office Type: This is an on-site role, implying a traditional office environment within TI's facilities in Dallas. It will likely include dedicated office space for the manager, team collaboration areas, and access to state-of-the-art engineering labs.

Office Location(s): The primary location is Dallas, Texas, specifically at TI's campus located at 12500 TI Blvd, Dallas, TX 75243. This facility houses significant R&D operations, design centers, and corporate functions.

Workspace Context:

  • Collaborative Environment: Expect a dynamic workspace designed to foster collaboration among design engineers, system architects, and other R&D professionals. This includes meeting rooms, breakout areas, and shared design environments.

  • Tools & Technology: Access to advanced Electronic Design Automation (EDA) tools, high-performance computing clusters for simulations, and sophisticated lab equipment for IC testing and validation.

  • Team Interaction: Regular team meetings, design reviews, brainstorming sessions, and one-on-one discussions with team members will be integral to the daily workflow.

Work Schedule: The standard work schedule is Monday to Friday. While core hours are expected, the nature of IC design management often requires flexibility to address urgent design issues, verification challenges, or to support global team members if applicable.

📝 Enhancement Note: The on-site nature of the role in a large corporate campus like TI's suggests a structured but collaborative work environment equipped with the necessary advanced tools and facilities for cutting-edge IC design.

📄 Application & Portfolio Review Process

Interview Process:

  • Initial Screening: HR or a recruiting manager will conduct an initial call to assess basic qualifications, experience, and cultural fit.

  • Technical Interview(s): Expect multiple rounds of in-depth technical interviews focusing on analog/mixed-signal design principles, specific IP knowledge (PLLs, ADCs, DACs), nanometer CMOS design challenges, system-level understanding of radar, and post-silicon debug experience. These may involve whiteboarding complex circuits or problem-solving scenarios.

  • Management & Leadership Interview: This round will assess your leadership style, team management experience, mentoring philosophy, ability to drive results, and cross-functional collaboration skills. Behavioral questions will be common here.

  • Portfolio Review: Be prepared to present detailed case studies from your portfolio. This will likely involve walking through 1-2 key projects, explaining design choices, challenges, solutions, and outcomes. Focus on your role, contributions, and the impact of your work.

  • Hiring Manager Interview: A final interview with the direct hiring manager (likely a Director or VP) to discuss strategic alignment, long-term vision for the team, and overall fit within the organization.

Portfolio Review Tips:

  • Select High-Impact Projects: Choose projects that best showcase your technical depth, leadership, and problem-solving capabilities relevant to analog/mixed-signal IC design for radar.

  • Quantify Results: Clearly present metrics (e.g., performance improvements, power savings, area reduction, successful first-pass silicon) and their impact on the product or business. Use graphs and charts effectively.

  • Focus on Your Role: As a manager candidate, emphasize not only your technical contributions but also your role in guiding the team, making architectural decisions, and ensuring successful project execution.

  • Structure Your Presentation: Organize your portfolio walkthrough logically: problem statement, proposed solution (architecture, design), implementation details, verification strategy, results, and lessons learned.

  • Be Prepared for Deep Dives: Anticipate detailed technical questions about your designs, the tools you used, and the trade-offs you made.

Challenge Preparation:

  • System-Level Thinking: Practice thinking about how analog IPs integrate into a larger system like a mmWave radar SoC. Understand the interfaces and performance requirements.

  • Analog Design Fundamentals: Brush up on core analog concepts: noise, linearity, bandwidth, stability, feedback systems, data converters, and PLL theory.

  • Management Scenarios: Prepare for questions about managing underperforming team members, resolving technical disagreements, prioritizing tasks, and motivating engineers.

  • Company Research: Understand TI's products, market position in radar, and company values. Tailor your answers to align with their strategic goals.

📝 Enhancement Note: The interview process is structured to evaluate both deep technical expertise and management capabilities. The portfolio review is highlighted as a critical component, requiring candidates to demonstrate not only technical success but also leadership in achieving it.

🛠 Tools & Technology Stack

Primary Tools:

  • EDA Suites: Cadence Virtuoso, Spectre, HSPICE, AMS Designer, Allegro (for layout). Synopsys tools may also be used.

  • Simulation & Verification: Verilog-A, Verilog-AMS, SystemVerilog for mixed-signal verification. MATLAB for algorithm development and system-level modeling.

  • Layout & Extraction: Tools for physical design, parasitic extraction (e.g., Quantus, StarRC), and layout verification (DRC/LVS).

  • Project Management: Tools like Jira, Confluence, or internal TI project management software for tracking tasks, progress, and documentation.

Analytics & Reporting:

  • Data Analysis: Advanced Excel, Python (with libraries like NumPy, Pandas, SciPy), MATLAB for analyzing simulation results, lab data, and performance metrics.

  • Visualization Tools: Tools for creating clear and impactful charts and graphs from data, such as Tableau, Power BI, or built-in capabilities within analytical software.

  • Reporting Platforms: Internal TI systems for generating and distributing technical reports, design reviews, and performance summaries.

CRM & Automation:

  • CRM: While not directly used by IC designers, understanding how CRM data informs product requirements and market strategy can be beneficial.

  • Automation Tools: Scripting languages like Python, Perl, or Tcl for automating simulation runs, data processing, and design flows.

  • Version Control: Git or Perforce for managing design files and code.

📝 Enhancement Note: The listed tools represent the standard industry-accepted EDA software for analog and mixed-signal IC design. Proficiency in these tools is non-negotiable, and experience with automation scripts is highly valued for efficiency.

👥 Team Culture & Values

Operations Values:

  • Innovation: A core value at TI, encouraging engineers to explore new ideas and push the boundaries of technology in semiconductor design.

  • Integrity: Upholding the highest ethical standards in all business dealings, design practices, and team interactions.

  • Excellence: Striving for the highest quality in designs, verification, and execution, aiming for first-pass silicon success and market-leading performance.

  • Collaboration: Fostering an environment where diverse teams work together seamlessly, sharing knowledge and expertise to achieve common goals.

  • Customer Focus: Understanding and prioritizing customer needs to deliver innovative solutions that provide significant value.

Collaboration Style:

  • Cross-functional Integration: The team is expected to work closely with system engineers, digital designers, verification experts, and product engineers. This requires clear communication, proactive engagement, and a shared understanding of project objectives.

  • Knowledge Sharing: Encouraging an open environment where engineers share insights, design best practices, and lessons learned through regular reviews, technical forums, and mentorship.

  • Feedback Culture: Promoting constructive feedback loops among team members and with stakeholders to continuously improve designs and processes.

📝 Enhancement Note: TI's stated values emphasize a strong culture of innovation, integrity, and customer focus, which are critical for a company at the forefront of semiconductor technology. The collaboration style highlights the need for strong interpersonal skills to navigate complex, multi-disciplinary projects.

⚡ Challenges & Growth Opportunities

Challenges:

  • Complexity of mmWave Design: Operating at 77GHz and 60GHz presents significant challenges in terms of parasitics, signal integrity, power management, and integration.

  • Managing Early-Career Engineers: Effectively mentoring and developing junior engineers while still meeting aggressive project deadlines requires strong leadership and resourcefulness.

  • First-Pass Silicon Success: The high cost of advanced semiconductor manufacturing demands rigorous verification and design processes to minimize the risk of silicon re-spins.

  • Rapid Technological Evolution: The radar market and semiconductor technology are constantly evolving, requiring continuous learning and adaptation of design methodologies.

Learning & Development Opportunities:

  • Advanced Technical Training: Access to internal and external courses on mmWave design, advanced analog circuits, nanometer CMOS effects, and new EDA tool capabilities.

  • Industry Conferences: Opportunities to attend and present at leading semiconductor and radar technology conferences (e.g., ISSCC, VLSI Symposium, IMS).

  • Mentorship Programs: Formal and informal mentorship opportunities with senior engineers and leaders within TI, facilitating career growth and knowledge transfer.

  • Leadership Development: Programs designed to enhance management skills, strategic thinking, and cross-functional leadership capabilities.

📝 Enhancement Note: The challenges identified are inherent to high-end IC design and management in a fast-paced industry. The growth opportunities are well-defined, focusing on both deepening technical expertise and developing leadership acumen.

💡 Interview Preparation

Strategy Questions:

  • "Describe your approach to architecting a critical analog IP (e.g., a PLL or ADC) for a high-performance radar system. What are the key trade-offs you consider, and how do you ensure robustness against process variations?"

  • "How do you manage a team of early-career engineers to deliver complex IC designs on time? Provide an example of a challenging situation you faced and how you resolved it."

  • "Walk me through a specific analog/mixed-signal design project from your portfolio where you encountered significant technical hurdles. What was the problem, what was your solution, and what was the final outcome?" Company & Culture Questions:

  • "What interests you about Texas Instruments and specifically our High-Performance Radar business unit?"

  • "How do you foster a culture of innovation and collaboration within your engineering team?"

  • "Describe a time you had to influence stakeholders or other teams to adopt your technical recommendations. What was your strategy?" Portfolio Presentation Strategy:

  • Focus on Impact: For each project, clearly state the business problem or technical challenge, your team's solution, and the quantifiable results (performance, cost, schedule).

  • Highlight Leadership: As a manager candidate, emphasize your role in guiding the team, making strategic design decisions, and ensuring project success, not just individual contributions.

  • Visualize Data: Use clear charts and graphs to present performance data, simulation results, and post-silicon validation outcomes. Avoid dense text slides.

  • Be Prepared for Q&A: Anticipate deep technical questions about your designs and strategic questions about your management approach.

📝 Enhancement Note: These sample questions are designed to probe technical depth, leadership capabilities, and strategic thinking, aligning with the requirements of an IC Design Manager role at a company like TI.

📌 Application Steps

To apply for this Analog/Mixed-Signal IC Design Manager position:

  • Submit your application through the Texas Instruments careers portal via the provided link.

  • Portfolio Customization: Prepare a concise portfolio (PDF or presentation) showcasing 2-3 of your most impactful analog/mixed-signal IC design projects. Focus on projects demonstrating leadership, complex problem-solving, and successful outcomes, particularly those relevant to high-frequency or radar applications.

  • Resume Optimization: Tailor your resume to highlight your experience in analog/mixed-signal IC design, nanometer CMOS, specific IP blocks (PLLs, ADCs, etc.), team leadership, mentoring, and post-silicon validation. Use keywords from the job description.

  • Interview Preparation: Practice answering technical questions related to analog circuit design and system-level radar concepts. Prepare behavioral responses for management and leadership scenarios, drawing from your experience. Rehearse your portfolio presentation to ensure clarity and conciseness.

  • Company Research: Thoroughly research Texas Instruments' High-Performance Radar products, their market position, and recent innovations. Understand TI's company values and culture to articulate how you align with them.

⚠️ Important Notice: This enhanced job description includes AI-generated insights and operations industry-standard assumptions. All details should be verified directly with Texas Instruments before making application decisions.

Application Requirements

Requires a Master's degree in Electrical Engineering and at least 7 years of experience in analog and mixed-signal nanometer CMOS IC design. Preferred candidates hold a PhD and have demonstrated experience in design ownership, lab measurements, and mentoring junior engineers.